vobo70 Posted January 25, 2020 Posted January 25, 2020 Hello, I try to run this image: Armbian_20.02.0-rc0_Bananapir2_buster_legacy_4.19.97_minimal.img on Sinovoip Banana PI R2 (from SD card) and on 1-st boot i'm stuck: Tx DQM dly bit4 = 0x0 DRAMC_DQODLY1=79A98889h DRAMC_DQODLY2=8988B99Ah DRAMC_DQODLY3=2203123h DRAMC_DQODLY4=31103014h Tx DQ dly bit4 = 0x0 Tx DQS dly = 0x8949 Tx DQS dly bit4 = 0x0 TX Byte0: DQ - 16, DQS - 17. win_sum= 32 TX Byte1: DQ - 21, DQS - 13. win_sum= 33 TX Byte2: DQ - 8, DQS - 22. win_sum= 29 TX Byte3: DQ - 8, DQS - 22. win_sum= 29 DRAMC calibration takes 651397386 CPU cycles [EMI] DRAMC calibration passed [MEM] complex R/W mem test pass 0:dram_rank_size:80000000 [Dram_Buffer] dram size:-2147483648 [Dram_Buffer] structure size: 1725560 [Dram_Buffer] MAX_TEE_DRAM_SIZE: 0 Boot from SD Card!! [PLFM] Init Boot Device: OK(0) [PART] blksz: 512B [PART] [0x0000000000000000-0x000000000003FFFF] "PRELOADER" (512 blocks) [PART] [0x0000000000000000-0x000000000003FFFF] " B[TOOL] <UART> listen ended, receive size:3! [TOOL] <UART> wait sync time 150ms->5ms [TOOL] <UART> receieved data: () Device APC domain init setup: bootloader load uboot ,the address of uboot is 81E00000 [PART]partition name UBOOT [PART]partition start block 0x200 [PART]partition size 0x80000 [PART]partition blks 0x400 [PART]partition flags 0x0 [PART]partition name 0x8 [bean] part->startblk(0x200) bdev->blksz(0x200) part->part_id(8) hdr(0xFFB50000) [BlkDev.c 101 ]partition block size 0x200 ,blks:0xECE000 [BlkDev.c 101 ]partition block erase size 0x200 [PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS] [PART] load speed: 5978KB/s, 300000 bytes, 49ms [BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102 0:dram_rank_size:80000000 [PLFM] md_type[0] = 255 [PLFM] md_type[1] = 255 [PLFM] boot reason: 0 [PLFM] boot mode: 0 [PLFM] META COM0: 0 [PLFM] <0xFFB7CC10>: 0x0 [PLFM] boot time: 1906ms [PLFM] DDR reserve mode: enable = 0, success = 0 [BLDR] jump to 0x81E00000 [BLDR] <0x81E00000>=0xEA0000B8 [BLDR] <0x81E00004>=0xE59FF014 [USBD] USB PRB0 LineState: 0 [USBD] USB cable/ No Cable inserted! [PLFM] Keep stay in USB Mode Platform initialization is ok wait for frequency meter finish, CLK26CALI = 0x81 mt_pll_post_init: mt_get_cpu_freq = 1040000Khz wait for frequency meter finish, CLK26CALI = 0x90 mt_pll_post_init: mt_get_bus_freq = 273000Khz wait for frequency meter finish, CLK26CALI = 0x81 mt_pll_post_init: mt_get_mem_freq = 133250Khz [PWRAP] pwrap_init_preloader [PWRAP] pwrap_init [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=1,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=2,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=3,rdata=800 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=9 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=10 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=1001 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=2003 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97 [PWRAP] _pwrap_init_reg_clock [PMIC_WRAP]wrap_init pass,the return value=0. [pmic6323_init] Preloader Start.................. [pmic6323_init] PMIC CHIP Code = 0x2023 INT_MISC_CON: 1 TOP_RST_MISC: 1 pl pmic powerkey Release [pmic6323_init] powerKey = 0 [pmic6323_init] is USB in = 0xB004 [pmic6323_init] Reg[0x11A]=0x1B pmic setup LED [pmic6323_init] Done................... mt7623 disable long press reset ->>>>> mt7623 disable long press reset <<<<<- mt7623 VPA supplied by 1.0V to MT7530 -> mt7623 VPA supplied by 1.0V to MT7530 <- mt7623 enables RG_VGP1_EN for LCM -> mt7623 enables RG_VGP1_EN for LCM <- MT7623 E2 setting => MT7623 E2 setting <= [PLFM] Init I2C: OK(0) [PLFM] Init PWRAP: OK(0) [PLFM] Init PMIC: OK(0) [PLFM] chip[CA00] [BLDR] [Support SD/eMMC] Build Time: 20170114-170026 ==== Dump RGU Reg ======== RGU MODE: 4D RGU LENGTH: FFE0 RGU STA: 0 RGU INTERVAL: FFF RGU SWSYSRST: 0 ==== Dump RGU Reg End ==== RGU: g_rgu_satus:0 mtk_wdt_mode_config mode value=10, tmp:22000010 PL P ON WDT does not trigger reboot RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3) kpd read addr: 0x0040: data:0x4001 Enter mtk_kpd_gpio_set! kpd debug column : 0, 0, 0, 0, 0, 0, 0, 0 kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0 after set KP enable: KP_SEL = 0x0 ! MTK_PMIC_RST_KEY is used for this project! [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=3967 [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] bbpu = 0xD, con = 0x426 [RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2 Writeif_unlock [RTC] RTC_SPAR0=0x40 rtc_2sec_reboot_check cali=1792 rtc_2sec_stat_clear [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800 [RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1 [RTC] bbpu = 0xD, con = 0x426, cali = 0x700 pl pmic powerkey Release [PLFM] Power key boot! [RTC] rtc_bbpu_power_on done [EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0 [EMI] PCDDR3 [Check]mt_get_mdl_number 0x0 [EMI] eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 [EMI] MDL number = 0 [EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 [EMI][Vcore]0x21E=0x48,0x220=0x48 [EMI][Vmem]0x554=0x0 wait for frequency meter finish, CLK26CALI = 0x81 [EMI] PCDDR3 DRAM Clock = 1600012 KHz, MEMPLL MODE = 2 [EMI] PCDDR3 RXTDN Calibration: Start REXTDN SW calibration... drvp=0xB,drvn=0x9 [EMI] pinmux = 4 =============================================================================== dramc_write_leveling_swcal =============================================================================== delay byte0 byte1 byte2 byte3 ----------------------------- 0 0 0 0 1 1 0 0 0 1 2 0 0 1 1 3 0 0 1 1 4 0 1 1 1 5 0 1 1 1 6 0 1 1 1 7 0 1 1 1 8 0 1 1 1 9 1 1 1 1 10 1 1 1 1 11 1 1 1 1 12 1 1 1 1 13 1 1 1 1 14 1 1 1 1 15 1 1 1 1 pass bytecount = 4 byte_i status best delay 0 2 9 1 2 4 2 2 2 3 2 0 ======================================== [write leveling]DQS: 0x249, DQM: 0x249 [write leveling after remap]DQ byte0 reg: 0x200 val: 0x99994444 [write leveling after remap]DQ byte1 reg: 0x204 val: 0x44449999 [write leveling after remap]DQ byte2 reg: 0x208 val: 0x22220000 [write leveling after remap]DQ byte3 reg: 0x20C val: 0x2222 ============================================= X-axis: DQS Gating Window Delay (Fine Scale) Y-axis: DQS Gating Window Delay (Coarse Scale) ============================================= 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0011:| 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0012:| 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0013:| 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0014:| 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Rank 0 coarse tune value selection : 18, 18 18 64 rank 0 coarse = 18 rank 0 fine = 64 00:| 0 0 0 0 0 0 0 0 1 1 1 0 opt_dle value:13 ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-31 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 0 0 0 0 0 0 0 0 0 0 10 | 0 0 0 0 0 0 0 0 0 0 20 | 0 0 0 0 0 0 0 0 0 0 30 | 0 0 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =50 DQS1 = 40 DQS2 =53 DQS3 = 44 ================================================================== bit DQS0 bit DQS1 bit DQS2 bit DQS3 0 (19~69)44 8 (5~58)31 16 (23~69)46 24 (15~58)36 1 (19~70)44 9 (7~60)33 17 (22~70)46 25 (15~60)37 2 (21~70)45 10 (9~62)35 18 (25~70)47 26 (17~63)40 3 (18~68)43 11 (11~61)36 19 (21~68)44 27 (17~63)40 4 (21~77)49 12 (17~62)39 20 (27~79)53 28 (21~68)44 5 (21~68)44 13 (15~61)38 21 (25~71)48 29 (18~61)39 6 (21~69)45 14 (13~60)36 22 (25~72)48 30 (16~62)39 7 (25~76)50 15 (16~64)40 23 (31~74)52 31 (18~64)41 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 6 6 5 7 1 6 5 0 9 7 10 | 5 4 1 2 4 0 7 7 6 9 20 | 0 5 5 1 8 7 4 4 0 5 30 | 5 3 ================================================================== *DQIDLY1 = 0x7050606 *DQIDLY2 = 0x50601 *DQIDLY3 = 0x4050709 *DQIDLY4 = 0x40201 *DQIDLY5 = 0x9060707 *DQIDLY6 = 0x1050500 *DQIDLY7 = 0x4040708 *DQIDLY8 = 0x3050500 *DRAMC_R0DELDLY = 0x2C352832 [MEM]CONA:F3A2,conf1:F07486A3 DM4BitMux = 1 DQSO 0 in TX per-bit = 2 <= DQSO 0 in WL = 9 DQSO 1 in TX per-bit = 0 <= DQSO 1 in WL = 4 [Warning] DQSO 2 in TX per-bit = 9 > DQSO 2 in WL = 2 [Warning] DQSO 3 in TX per-bit = 8 > DQSO 3 in WL = 0 Tx DQM dly = 0x1189 Tx DQM dly bit4 = 0x0 DRAMC_DQODLY1=79A98989h DRAMC_DQODLY2=8988B99Bh DRAMC_DQODLY3=2103123h DRAMC_DQODLY4=31103014h Tx DQ dly bit4 = 0x0 Tx DQS dly = 0x8949 Tx DQS dly bit4 = 0x0 TX Byte0: DQ - 16, DQS - 17. win_sum= 32 TX Byte1: DQ - 21, DQS - 13. win_sum= 33 TX Byte2: DQ - 8, DQS - 22. win_sum= 29 TX Byte3: DQ - 8, DQS - 22. win_sum= 29 DRAMC calibration takes 651397844 CPU cycles [EMI] DRAMC calibration passed [MEM] complex R/W mem test pass 0:dram_rank_size:80000000 [Dram_Buffer] dram size:-2147483648 [Dram_Buffer] structure size: 1725560 [Dram_Buffer] MAX_TEE_DRAM_SIZE: 0 Boot from SD Card!! [PLFM] Init Boot Device: OK(0) [PART] blksz: 512B [PART] [0x0000000000000000-0x000000000003FFFF] "PRELOADER" (512 blocks) [PART] [0x0000000000000000-0x000000000003FFFF] "MBR" (512 blocks) [PART] [0x0000000000040000-0x00000000000BFFFF] "UBOOT" (1024 blocks) [PART] [0x00000000000C0000-0x00000000000FFFFF] "CONFIG" (512 blocks) [PART] [0x0000000000100000-0x000000000013FFFF] "FACTORY" (512 blocks) [PART] [0x0000000000140000-0x000000000213FFFF] "BOOTIMG" (65536 blocks) [PART] [0x0000000002140000-0x000000000413FFFF] "RECOVERY" (65536 blocks) [PART] [0x0000000004140000-0x000000004413FFFF] "ROOTFS" (2097152 blocks) [PART] [0x0000000044140000-0x000001FFC413FFFF] "USER" (-4194304 blocks) [platform_vusb_on] PASS [TOOL] PMIC not dectect usb cable! [TOOL] <UART> listen ended, receive size:0! [TOOL] <UART> wait sync time 150ms->5ms [TOOL] <UART> receieved data: () Device APC domain init setup: bootloader load uboot ,the address of uboot is 81E00000 [PART]partition name UBOOT [PART]partition start block 0x200 [PART]partition size 0x80000 [PART]partition blks 0x400 [PART]partition flags 0x0 [PART]partition name 0x8 [bean] part->startblk(0x200) bdev->blksz(0x200) part->part_id(8) hdr(0xFFB50000) [BlkDev.c 101 ]partition block size 0x200 ,blks:0xECE000 [BlkDev.c 101 ]partition block erase size 0x200 [PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS] [PART] load speed: 5978KB/s, 300000 bytes, 49ms [BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102 0:dram_rank_size:80000000 [PLFM] md_type[0] = 255 [PLFM] md_type[1] = 255 [PLFM] boot reason: 0 [PLFM] boot mode: 0 [PLFM] META COM0: 0 [PLFM] <0xFFB7CC10>: 0x0 [PLFM] boot time: 1901ms [PLFM] DDR reserve mode: enable = 0, success = 0 [BLDR] jump to 0x81E00000 [BLDR] <0x81E00000>=0xEA0000B8 [BLDR] <0x81E00004>=0xE59FF014
vobo70 Posted February 2, 2020 Author Posted February 2, 2020 checked all builds: up to 5.75 works perfectly; after no one boot; all stuck on same message; any help will appreciated. 1
Xmoe Posted February 19, 2020 Posted February 19, 2020 (edited) What I have found out about this problem: The Bananapi R2 needs the SD card to have special headers in the first 2k of space, after that comes a preloader which is then in turn loading u-boot. Those headers and the preloader are distributed as binary blobs (found in build/packages/blobs/mt7623n/BPI-R2-preloader-2k.img of the build tool). As it turns out, the blob of the preloader is a bit older, which had a restriction on the size of the "u-boot.bin" it could load. There has been a newer release which increases the allowed max size of "u-boot.bin" that is loaded (http://forum.banana-pi.org/t/which-preloader-image-to-use/4602/24). So what happened is probably following: over time u-boot got more and more features and as such the u-boot-binary grew larger, so much so that at some point it was too large for the preloader. It can be fixed by upgrading the binary blob for the preloader to this one: https://github.com/BPI-SINOVOIP/BPI-files/blob/master/SD/100MB/BPI-R2-preloader-DDR1600-20191024-2k.img.gz (as outlined in the forum post linked above). Steps to fix the build process: 1) Download and unpack https://github.com/BPI-SINOVOIP/BPI-files/blob/master/SD/100MB/BPI-R2-preloader-DDR1600-20191024-2k.img.gz 2) Rename to "BPI-R2-preloader-2k.img" 3) Move to "build/packages/blobs/mt7623n/BPI-R2-preloader-2k.img" (replace the old one by doing so) Steps to fix the provided images from https://dl.armbian.com/bananapir2/archive/ 1) Download and unpack https://github.com/BPI-SINOVOIP/BPI-files/blob/master/SD/100MB/BPI-R2-preloader-DDR1600-20191024-2k.img.gz 2) Rename to "BPI-R2-preloader-2k.img" 3) Be careful with the `dd` command: 4) Patch the images by writing the new bootloader into the images using dd if=BPI-R2-preloader-2k.img of=<PATH/TO/ARMBIAN.img> bs=1k seek=2 status=progress conv=notrunc So for example it looks like this: dd if=BPI-R2-preloader-2k.img of=Armbian_19.11.3_Bananapir2_bionic_legacy_4.19.85_minimal.img bs=1k seek=2 status=progress conv=notrunc The command skips the first 2k of the armbian.img (given by seek=2 in combination with bs=1k) and then writes the new bootloader at that location, right over the old one. The `conv=notrunc` part makes sure that the rest of the original file doesn't get cut-off. Now you have a patched img which you can burn to your SD card. This would be great to be fixed upstream, but right now I don't know how to. Edited February 19, 2020 by Xmoe 1
chwe Posted February 20, 2020 Posted February 20, 2020 On 2/19/2020 at 11:41 PM, Xmoe said: This would be great to be fixed upstream, but right now I don't know how to. Expand if upstream means armbian github.. if yes.. done see: https://github.com/armbian/build/commit/3b3d46ca7f1963e04c0ca98e68056ca14a9e94b4 thanks for investigating and sharing.. @Igor can you rebuild and push to download page.. Can't test cause I don't find my board. @Xmoe can you test after its? 1
Xmoe Posted February 20, 2020 Posted February 20, 2020 On 2/20/2020 at 12:38 AM, chwe said: if upstream means armbian github.. if yes.. done see: https://github.com/armbian/build/commit/3b3d46ca7f1963e04c0ca98e68056ca14a9e94b4 Expand Awesome! I will check tomorrow when there is the new build.
Igor Posted February 20, 2020 Posted February 20, 2020 On 2/20/2020 at 12:38 AM, chwe said: can you rebuild and push to download page.. Can't test cause I don't find my board. Expand Done. You won't believe but I also don't find it
Xmoe Posted February 20, 2020 Posted February 20, 2020 I can confirm it works for Armbian_20.02.2_Bananapir2_bionic_legacy_4.19.105_minimal.img: Reveal hidden contents [USBD] USB PRB0 LineState: 0 [USBD] USB cable/ No Cable inserted! [PLFM] Keep stay in USB Mode Platform initialization is ok wait for frequency meter finish, CLK26CALI = 0x81 mt_pll_post_init: mt_get_cpu_freq = 1040000Khz wait for frequency meter finish, CLK26CALI = 0x90 mt_pll_post_init: mt_get_bus_freq = 273000Khz wait for frequency meter finish, CLK26CALI = 0x81 mt_pll_post_init: mt_get_mem_freq = 133250Khz [PWRAP] pwrap_init_preloader [PWRAP] pwrap_init [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=1,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=2,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=3,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=9 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=10 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=11 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97 [PWRAP] _pwrap_init_reg_clock [PMIC_WRAP]wrap_init pass,the return value=0. [pmic6323_init] Preloader Start.................. [pmic6323_init] PMIC CHIP Code = 0x2023 INT_MISC_CON: 0 TOP_RST_MISC: 0 pl pmic powerkey Press [pmic6323_init] powerKey = 1 [pmic6323_init] is USB in = 0xB004 [pmic6323_init] Reg[0x11A]=0x1B pmic setup LED [pmic6323_init] Done................... mt7623 disable long press reset ->>>>> mt7623 disable long press reset <<<<<- mt7623 VPA supplied by 1.0V to MT7530 -> mt7623 VPA supplied by 1.0V to MT7530 <- mt7623 enables RG_VGP1_EN for LCM -> mt7623 enables RG_VGP1_EN for LCM <- MT7623 E2 setting => MT7623 E2 setting <= [PLFM] Init I2C: OK(0) [PLFM] Init PWRAP: OK(0) [PLFM] Init PMIC: OK(0) [PLFM] chip[CA00] [BLDR] [Support SD/eMMC] Build Time: 20191024-155141 ==== Dump RGU Reg ======== RGU MODE: 4D RGU LENGTH: FFE0 RGU STA: 0 RGU INTERVAL: FFF RGU SWSYSRST: 0 ==== Dump RGU Reg End ==== RGU: g_rgu_satus:0 mtk_wdt_mode_config mode value=10, tmp:22000010 PL P ON WDT does not trigger reboot RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3) kpd read addr: 0x0040: data:0x4001 Enter mtk_kpd_gpio_set! kpd debug column : 0, 0, 0, 0, 0, 0, 0, 0 kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0 after set KP enable: KP_SEL = 0x0 ! MTK_PMIC_RST_KEY is used for this project! [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=3968 [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] bbpu = 0xF, con = 0xABF6 rtc_first_boot_init [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=3967 [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] get_frequency_meter: input=0x0, ouput=0 rtc_2sec_stat_clear rtc_2sec_reboot_check cali=1792 rtc_2sec_stat_clear [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0xC0, spar1 = 0x800 [RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1 [RTC] bbpu = 0xF, con = 0x426, cali = 0x700 pl pmic powerkey Press power key is pressed [PLFM] Power key boot! [RTC] rtc_bbpu_power_on done [EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0 [EMI] PCDDR3 [Check]mt_get_mdl_number 0x0 [EMI] eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 [EMI] MDL number = 0 [EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 [EMI][Vcore]0x21E=0x48,0x220=0x48 [EMI][Vmem]0x554=0x0 wait for frequency meter finish, CLK26CALI = 0x81 [EMI] PCDDR3 DRAM Clock = 1600012 KHz, MEMPLL MODE = 2 [EMI] PCDDR3 RXTDN Calibration: Start REXTDN SW calibration... drvp=0xB,drvn=0x9 [EMI] pinmux = 4 =============================================================================== dramc_write_leveling_swcal =============================================================================== delay byte0 byte1 byte2 byte3 ----------------------------- 0 0 1 1 1 1 0 1 1 1 2 1 1 1 1 3 1 1 1 1 4 1 1 1 1 5 1 1 1 1 6 1 1 1 1 7 1 1 1 1 8 1 1 1 1 9 1 1 1 1 10 1 1 1 1 11 1 1 1 1 12 1 1 1 1 13 1 1 1 1 14 1 1 1 1 15 1 1 1 1 pass bytecount = 4 byte_i status best delay 0 2 2 1 2 0 2 2 0 3 2 0 ======================================== [write leveling]DQS: 0x2, DQM: 0x2 [write leveling after remap]DQ byte0 reg: 0x200 val: 0x22220000 [write leveling after remap]DQ byte1 reg: 0x204 val: 0x2222 [write leveling after remap]DQ byte2 reg: 0x208 val: 0x0 [write leveling after remap]DQ byte3 reg: 0x20C val: 0x0 ============================================= X-axis: DQS Gating Window Delay (Fine Scale) Y-axis: DQS Gating Window Delay (Coarse Scale) ============================================= 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0011:| 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0012:| 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0013:| 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0014:| 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Rank 0 coarse tune value selection : 18, 18 18 48 rank 0 coarse = 18 rank 0 fine = 48 00:| 0 0 0 0 0 0 0 0 1 1 1 0 opt_dle value:13 ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-31 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 0 0 0 0 0 0 0 0 0 0 10 | 0 0 0 0 0 0 0 0 0 0 20 | 0 0 0 0 0 0 0 0 0 0 30 | 0 0 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =50 DQS1 = 38 DQS2 =48 DQS3 = 42 ================================================================== bit DQS0 bit DQS1 bit DQS2 bit DQS3 0 (20~67)43 8 (9~56)32 16 (23~68)45 24 (17~58)37 1 (21~67)44 9 (9~56)32 17 (20~64)42 25 (15~57)36 2 (22~70)46 10 (11~60)35 18 (25~70)47 26 (17~62)39 3 (18~66)42 11 (14~58)36 19 (19~66)42 27 (18~63)40 4 (21~68)44 12 (16~61)38 20 (24~71)47 28 (22~62)42 5 (20~68)44 13 (12~58)35 21 (23~69)46 29 (19~63)41 6 (23~68)45 14 (14~58)36 22 (23~70)46 30 (15~60)37 7 (27~74)50 15 (15~61)38 23 (25~71)48 31 (19~64)41 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 7 6 4 8 6 6 5 0 6 6 10 | 3 2 0 3 2 0 3 6 1 6 20 | 1 2 2 0 5 6 3 2 0 1 30 | 5 1 ================================================================== *DQIDLY1 = 0x8040607 *DQIDLY2 = 0x50606 *DQIDLY3 = 0x2030606 *DQIDLY4 = 0x20300 *DQIDLY5 = 0x6010603 *DQIDLY6 = 0x20201 *DQIDLY7 = 0x2030605 *DQIDLY8 = 0x1050100 *DRAMC_R0DELDLY = 0x2A302632 [MEM]CONA:F3A2,conf1:F07486A3 DM4BitMux = 1 [Warning] DQSO 0 in TX per-bit = 4 > DQSO 0 in WL = 2 DQSO 1 in TX per-bit = 0 <= DQSO 1 in WL = 0 [Warning] DQSO 2 in TX per-bit = 10 > DQSO 2 in WL = 0 [Warning] DQSO 3 in TX per-bit = 8 > DQSO 3 in WL = 0 Tx DQM dly = 0x1121 Tx DQM dly bit4 = 0x0 DRAMC_DQODLY1=1121343h DRAMC_DQODLY2=33212110h DRAMC_DQODLY3=1202112h DRAMC_DQODLY4=11014233h Tx DQ dly bit4 = 0x0 Tx DQS dly = 0x8A04 Tx DQS dly bit4 = 0x0 TX Byte0: DQ - 12, DQS - 17. win_sum= 28 TX Byte1: DQ - 16, DQS - 12. win_sum= 27 TX Byte2: DQ - 6, DQS - 24. win_sum= 29 TX Byte3: DQ - 7, DQS - 22. win_sum= 28 DRAMC calibration takes 650496427 CPU cycles [EMI] DRAMC calibration passed [MEM] complex R/W mem test pass 0:dram_rank_size:80000000 [Dram_Buffer] dram size:-2147483648 [Dram_Buffer] structure size: 1725560 [Dram_Buffer] MAX_TEE_DRAM_SIZE: 0 Boot from SD Card!! Load u-boot from SD Card... [PLFM] Init Boot Device: OK(0) [PART] blksz: 512B [PART] [0x0000000000000000-0x000000000003FFFF] "PRELOADER" (512 blocks) [PART] [0x0000000000000000-0x000000000003FFFF] "MBR" (512 blocks) [PART] [0x0000000000040000-0x00000000000BFFFF] "UBOOT" (1024 blocks) [PART] [0x00000000000C0000-0x00000000000FFFFF] "CONFIG" (512 blocks) [PART] [0x0000000000100000-0x000000000013FFFF] "FACTORY" (512 blocks) [PART] [0x0000000000140000-0x000000000213FFFF] "BOOTIMG" (65536 blocks) [PART] [0x0000000002140000-0x000000000413FFFF] "RECOVERY" (65536 blocks) [PART] [0x0000000004140000-0x000000004413FFFF] "ROOTFS" (2097152 blocks) [PART] [0x0000000044140000-0x000001FFC413FFFF] "USER" (-4194304 blocks) [platform_vusb_on] PASS [TOOL] PMIC not dectect usb cable! [TOOL] <UART> listen ended, receive size:0! [TOOL] <UART> wait sync time 150ms->5ms [TOOL] <UART> receieved data: () Device APC domain init setup: bootloader load uboot ,the address of uboot is 81E00000 [PART]partition name UBOOT [PART]partition start block 0x200 [PART]partition size 0x80000 [PART]partition blks 0x400 [PART]partition flags 0x0 [PART]partition name 0x8 [bean] part->startblk(0x200) bdev->blksz(0x200) part->part_id(8) hdr(0xFFB50000) [BlkDev.c 101 ]partition block size 0x200 ,blks:0x76F5000 [BlkDev.c 101 ]partition block erase size 0x200 [PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS] [PART] load speed: 6480KB/s, 524288 bytes, 79ms [BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102 0:dram_rank_size:80000000 [PLFM] md_type[0] = 255 [PLFM] md_type[1] = 255 [PLFM] boot reason: 0 [PLFM] boot mode: 0 [PLFM] META COM0: 0 [PLFM] <0xFFB7CC10>: 0x0 [PLFM] boot time: 2968ms [PLFM] DDR reserve mode: enable = 0, success = 0 [BLDR] jump to 0x81E00000 [BLDR] <0x81E00000>=0xEA0000B8 [BLDR] <0x81E00004>=0xE59FF014 U-Boot 2019.10-armbian (Feb 20 2020 - 18:47:04 +0100) CPU: MediaTek MT7623 E3 DRAM: 2 GiB WDT: Started with servicing (60s timeout) MMC: mmc@11230000: 0, mmc@11240000: 1 Loading Environment from EXT4... Card did not respond to voltage select! In: serial Out: serial Err: serial Net: Warning: ethernet@1b100000 (eth0) using random MAC address - 36:85:74:d5:a6:63 eth0: ethernet@1b100000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc1 is current device 1092 bytes read in 2 ms (533.2 KiB/s) Running boot/boot.scr from: mmc 1:1 using boot/boot.scr ## Executing script at 85f80000 Boot script loaded from device 1 78 bytes read in 2 ms (38.1 KiB/s) 27385 bytes read in 4 ms (6.5 MiB/s) 6988609 bytes read in 345 ms (19.3 MiB/s) 8425984 bytes read in 415 ms (19.4 MiB/s) Booting boot/zImage boot/uInitrd boot/dtb/mt7623n-bananapi-bpi-r2.dtb from: mmc 1:1 using bootargs=console=ttyS2,115200n1 root=UUID=be5d2d08-b53d-480f-b554-b742d3785d89 rw rootf1 Kernel image @ 0x82000000 [ 0x000000 - 0x809200 ] ## Loading init Ramdisk from Legacy Image at 86080000 ... Image Name: uInitrd Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 6988545 Bytes = 6.7 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 86000000 Booting using the fdt blob at 0x86000000 Loading Ramdisk to 8f955000, end 8ffff301 ... OK Loading Device Tree to 8f94b000, end 8f954af8 ... OK Starting kernel ... Loading, please wait... starting version 237 Begin: Loading essential drivers ... done. Begin: Running /scripts/init-premount ... done. Begin: Mounting root file system ... Begin: Running /scripts/local-top ... done. Begin: Running /scripts/local-premount ... done. Begin: Will now check root file system ... fsck from util-linux 2.31.1 [/sbin/fsck.ext4 (1) -- /dev/mmcblk1p1] fsck.ext4 -a -C0 /dev/mmcblk1p1 /dev/mmcblk1p1: clean, 19743/121920 files, 385870/487424 blocks done. done. Begin: Running /scripts/local-bottom ... done. Begin: Running /scripts/init-bottom ... done. Welcome to Ubuntu 18.04.4 LTS! [ OK ] Reached target System Time Synchronized. [ OK ] Started Dispatch Password Requests to Console Directory Watch. [ OK ] Reached target Swap. [ OK ] Reached target Remote File Systems. [ OK ] Started Forward Password Requests to Wall Directory Watch. [ OK ] Created slice System Slice. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on udev Control Socket. [ OK ] Created slice system-serial\x2dgetty.slice. [ OK ] Listening on Syslog Socket. [ OK ] Listening on udev Kernel Socket. [ OK ] Listening on fsck to fsckd communication Socket. [ OK ] Listening on Journal Socket. Mounting POSIX Message Queue File System... Starting Set the console keyboard layout... Starting Load Kernel Modules... Starting Restore / save the current clock... Mounting Kernel Debug File System... Starting Create list of required st��…ce nodes for the current kernel... Starting Remount Root and Kernel File Systems... Starting udev Coldplug all Devices... Starting Nameserver information manager... [ OK ] Listening on Journal Socket (/dev/log). Starting Journal Service... [ OK ] Created slice User and Session Slice. [ OK ] Reached target Slices. [ OK ] Reached target Local Encrypted Volumes. [ OK ] Mounted POSIX Message Queue File System. [ OK ] Started Load Kernel Modules. [ OK ] Started Restore / save the current clock. [ OK ] Mounted Kernel Debug File System. [ OK ] Started Create list of required sta��…vice nodes for the current kernel. [ OK ] Started Set the console keyboard layout. [ OK ] Started Remount Root and Kernel File Systems. Starting Load/Save Random Seed... Starting Create Static Device Nodes in /dev... Starting Apply Kernel Variables... Mounting FUSE Control File System... Mounting Kernel Configuration File System... [ OK ] Started Journal Service. [ OK ] Started Nameserver information manager. [ OK ] Started Load/Save Random Seed. [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Apply Kernel Variables. [ OK ] Mounted FUSE Control File System. [ OK ] Mounted Kernel Configuration File System. [ OK ] Started udev Coldplug all Devices. [ OK ] Reached target Local File Systems (Pre). Mounting /tmp... Starting udev Kernel Device Manager... [ OK ] Reached target Network (Pre). Starting Flush Journal to Persistent Storage... [ OK ] Mounted /tmp. [ OK ] Reached target Local File Systems. Starting Armbian ZRAM config... Starting Raise network interfaces... Starting Set console font and keymap... [ OK ] Started udev Kernel Device Manager. [ OK ] Started Flush Journal to Persistent Storage. Starting Create Volatile Files and Directories... [ OK ] Started Set console font and keymap. [ OK ] Started Create Volatile Files and Directories. Starting Network Name Resolution... Starting Update UTMP about System Boot/Shutdown... [ OK ] Found device /dev/ttyS0. [ OK ] Found device /dev/ttyS2. [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. [ OK ] Started Raise network interfaces. [ OK ] Started Network Name Resolution. [ OK ] Reached target Host and Network Name Lookups. [ OK ] Started Armbian ZRAM config. Starting Armbian memory supported logging... [ OK ] Started Armbian memory supported logging. [ OK ] Reached target System Initialization. [ OK ] Started Daily Cleanup of Temporary Directories. Starting Armbian hardware optimization... Starting Armbian filesystem resize... [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Started resolvconf-pull-resolved.path. [ OK ] Reached target Paths. [ OK ] Started Message of the Day. [ OK ] Started Discard unused blocks once a week. Starting Armbian hardware monitoring... [ OK ] Started Daily apt download activities. [ OK ] Started Daily apt upgrade and clean activities. [ OK ] Reached target Timers. [ OK ] Started Armbian hardware optimization. [ OK ] Started Armbian hardware monitoring. [ OK ] Started Armbian filesystem resize. [ OK ] Reached target Basic System. Starting System Logging Service... [ OK ] Started Regular background program processing daemon. Starting resolvconf-pull-resolved.service... Starting Resets System Activity Data Collector... Starting Login Service... [ OK ] Started Armbian first run tasks. Starting LSB: Load kernel modules needed to enable cpufreq scaling... Starting rng-tools.service... [ OK ] Started D-Bus System Message Bus. Starting Network Manager... Starting WPA supplicant... [ OK ] Started System Logging Service. [ OK ] Started resolvconf-pull-resolved.service. [ OK ] Started Resets System Activity Data Collector. [ OK ] Started rng-tools.service. [ OK ] Started Login Service. [ OK ] Started WPA supplicant. [ OK ] Started LSB: Load kernel modules needed to enable cpufreq scaling. Starting LSB: set CPUFreq kernel parameters... [ OK ] Started LSB: set CPUFreq kernel parameters. Starting LSB: Set sysfs variables from /etc/sysfs.conf... [ OK ] Started LSB: Set sysfs variables from /etc/sysfs.conf. Starting Hostname Service... [ OK ] Started Hostname Service. [ OK ] Started Network Manager. Starting Network Manager Script Dispatcher Service... [ OK ] Reached target Network. Starting OpenBSD Secure Shell server... Starting chrony, an NTP client/server... Starting Permit User Sessions... Starting Network Manager Wait Online... [ OK ] Started Network Manager Script Dispatcher Service. [ OK ] Started Permit User Sessions. Starting Set console scheme... [ OK ] Started Set console scheme. [ OK ] Created slice system-getty.slice. [ OK ] Started chrony, an NTP client/server. [ OK ] Started OpenBSD Secure Shell server. Starting Authorization Manager... [ OK ] Started Authorization Manager. [ OK ] Started Network Manager Wait Online. [ OK ] Reached target Network is Online. Starting /etc/rc.local Compatibility... Starting LSB: Advanced IEEE 802.11 management daemon... [ OK ] Started /etc/rc.local Compatibility. [ OK ] Started LSB: Advanced IEEE 802.11 management daemon. [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Serial Getty on ttyS2. [ OK ] Reached target Login Prompts. [ OK ] Reached target Multi-User System. [ OK ] Reached target Graphical Interface. Starting Update UTMP about System Runlevel Changes... [ OK ] Started Update UTMP about System Runlevel Changes. Armbian 20.02.2 Bionic ttyS2 bananapir2 login: And for Armbian_20.02.2_Bananapir2_buster_legacy_4.19.105_minimal.img it boots as well: Reveal hidden contents [USBD] USB PRB0 LineState: 0 [USBD] USB cable/ No Cable inserted! [PLFM] Keep stay in USB Mode Platform initialization is ok wait for frequency meter finish, CLK26CALI = 0x81 mt_pll_post_init: mt_get_cpu_freq = 1040000Khz wait for frequency meter finish, CLK26CALI = 0x90 mt_pll_post_init: mt_get_bus_freq = 273000Khz wait for frequency meter finish, CLK26CALI = 0x81 mt_pll_post_init: mt_get_mem_freq = 133250Khz [PWRAP] pwrap_init_preloader [PWRAP] pwrap_init [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=1,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=2,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=3,rdata=2D52 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=9 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=10 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=11 rdata=5AA5 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=B54B [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97 [PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97 [PWRAP] _pwrap_init_reg_clock [PMIC_WRAP]wrap_init pass,the return value=0. [pmic6323_init] Preloader Start.................. [pmic6323_init] PMIC CHIP Code = 0x2023 INT_MISC_CON: 0 TOP_RST_MISC: 0 pl pmic powerkey Release [pmic6323_init] powerKey = 0 [pmic6323_init] is USB in = 0xB004 [pmic6323_init] Reg[0x11A]=0x1B pmic setup LED [pmic6323_init] Done................... mt7623 disable long press reset ->>>>> mt7623 disable long press reset <<<<<- mt7623 VPA supplied by 1.0V to MT7530 -> mt7623 VPA supplied by 1.0V to MT7530 <- mt7623 enables RG_VGP1_EN for LCM -> mt7623 enables RG_VGP1_EN for LCM <- MT7623 E2 setting => MT7623 E2 setting <= [PLFM] Init I2C: OK(0) [PLFM] Init PWRAP: OK(0) [PLFM] Init PMIC: OK(0) [PLFM] chip[CA00] [BLDR] [Support SD/eMMC] Build Time: 20191024-155141 ==== Dump RGU Reg ======== RGU MODE: 4D RGU LENGTH: FFE0 RGU STA: 0 RGU INTERVAL: FFF RGU SWSYSRST: 0 ==== Dump RGU Reg End ==== RGU: g_rgu_satus:0 mtk_wdt_mode_config mode value=10, tmp:22000010 PL P ON WDT does not trigger reboot RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3) kpd read addr: 0x0040: data:0x4001 Enter mtk_kpd_gpio_set! kpd debug column : 0, 0, 0, 0, 0, 0, 0, 0 kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0 after set KP enable: KP_SEL = 0x0 ! MTK_PMIC_RST_KEY is used for this project! [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=3968 [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] bbpu = 0xD, con = 0x8427 rtc_first_boot_init [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=3967 [RTC] get_frequency_meter: input=0x0, ouput=5 [RTC] get_frequency_meter: input=0x0, ouput=0 [RTC] get_frequency_meter: input=0x0, ouput=0 rtc_2sec_stat_clear rtc_2sec_reboot_check cali=1792 rtc_2sec_stat_clear [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0xC0, spar1 = 0x800 [RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1 [RTC] bbpu = 0xD, con = 0x426, cali = 0x700 pl pmic powerkey Release [PLFM] Power key boot! [RTC] rtc_bbpu_power_on done [EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0 [EMI] PCDDR3 [Check]mt_get_mdl_number 0x0 [EMI] eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 [EMI] MDL number = 0 [EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 [EMI][Vcore]0x21E=0x48,0x220=0x48 [EMI][Vmem]0x554=0x0 wait for frequency meter finish, CLK26CALI = 0x81 [EMI] PCDDR3 DRAM Clock = 1600012 KHz, MEMPLL MODE = 2 [EMI] PCDDR3 RXTDN Calibration: Start REXTDN SW calibration... drvp=0xB,drvn=0x9 [EMI] pinmux = 4 =============================================================================== dramc_write_leveling_swcal =============================================================================== delay byte0 byte1 byte2 byte3 ----------------------------- 0 0 1 1 1 1 0 1 1 1 2 1 1 1 1 3 1 1 1 1 4 1 1 1 1 5 1 1 1 1 6 1 1 1 1 7 1 1 1 1 8 1 1 1 1 9 1 1 1 1 10 1 1 1 1 11 1 1 1 1 12 1 1 1 1 13 1 1 1 1 14 1 1 1 1 15 1 1 1 1 pass bytecount = 4 byte_i status best delay 0 2 2 1 2 0 2 2 0 3 2 0 ======================================== [write leveling]DQS: 0x2, DQM: 0x2 [write leveling after remap]DQ byte0 reg: 0x200 val: 0x22220000 [write leveling after remap]DQ byte1 reg: 0x204 val: 0x2222 [write leveling after remap]DQ byte2 reg: 0x208 val: 0x0 [write leveling after remap]DQ byte3 reg: 0x20C val: 0x0 ============================================= X-axis: DQS Gating Window Delay (Fine Scale) Y-axis: DQS Gating Window Delay (Coarse Scale) ============================================= 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0011:| 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0012:| 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0013:| 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0014:| 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Rank 0 coarse tune value selection : 18, 18 18 48 rank 0 coarse = 18 rank 0 fine = 48 00:| 0 0 0 0 0 0 0 0 1 1 1 0 opt_dle value:13 ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-31 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 0 0 0 0 0 0 0 0 0 0 10 | 0 0 0 0 0 0 0 0 0 0 20 | 0 0 0 0 0 0 0 0 0 0 30 | 0 0 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =50 DQS1 = 38 DQS2 =48 DQS3 = 41 ================================================================== bit DQS0 bit DQS1 bit DQS2 bit DQS3 0 (20~67)43 8 (9~56)32 16 (23~67)45 24 (17~57)37 1 (20~66)43 9 (8~56)32 17 (20~64)42 25 (15~57)36 2 (22~70)46 10 (11~61)36 18 (25~69)47 26 (17~61)39 3 (18~66)42 11 (14~57)35 19 (19~66)42 27 (18~61)39 4 (21~68)44 12 (16~61)38 20 (24~72)48 28 (21~62)41 5 (20~68)44 13 (12~57)34 21 (23~68)45 29 (19~61)40 6 (23~68)45 14 (14~58)36 22 (23~69)46 30 (15~60)37 7 (27~74)50 15 (15~61)38 23 (25~71)48 31 (19~64)41 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 7 7 4 8 6 6 5 0 6 6 10 | 2 3 0 4 2 0 3 6 1 6 20 | 0 3 2 0 4 5 2 2 0 1 30 | 4 0 ================================================================== *DQIDLY1 = 0x8040707 *DQIDLY2 = 0x50606 *DQIDLY3 = 0x3020606 *DQIDLY4 = 0x20400 *DQIDLY5 = 0x6010603 *DQIDLY6 = 0x20300 *DQIDLY7 = 0x2020504 *DQIDLY8 = 0x40100 *DRAMC_R0DELDLY = 0x29302632 [MEM]CONA:F3A2,conf1:F07486A3 DM4BitMux = 1 [Warning] DQSO 0 in TX per-bit = 4 > DQSO 0 in WL = 2 DQSO 1 in TX per-bit = 0 <= DQSO 1 in WL = 0 [Warning] DQSO 2 in TX per-bit = 10 > DQSO 2 in WL = 0 [Warning] DQSO 3 in TX per-bit = 9 > DQSO 3 in WL = 0 Tx DQM dly = 0x2121 Tx DQM dly bit4 = 0x0 DRAMC_DQODLY1=1121343h DRAMC_DQODLY2=33222110h DRAMC_DQODLY3=1203223h DRAMC_DQODLY4=23024232h Tx DQ dly bit4 = 0x0 Tx DQS dly = 0x9A04 Tx DQS dly bit4 = 0x0 TX Byte0: DQ - 12, DQS - 17. win_sum= 28 TX Byte1: DQ - 16, DQS - 12. win_sum= 27 TX Byte2: DQ - 6, DQS - 23. win_sum= 28 TX Byte3: DQ - 6, DQS - 22. win_sum= 27 DRAMC calibration takes 650320939 CPU cycles [EMI] DRAMC calibration passed [MEM] complex R/W mem test pass 0:dram_rank_size:80000000 [Dram_Buffer] dram size:-2147483648 [Dram_Buffer] structure size: 1725560 [Dram_Buffer] MAX_TEE_DRAM_SIZE: 0 Boot from SD Card!! Load u-boot from SD Card... [PLFM] Init Boot Device: OK(0) [PART] blksz: 512B [PART] [0x0000000000000000-0x000000000003FFFF] "PRELOADER" (512 blocks) [PART] [0x0000000000000000-0x000000000003FFFF] "MBR" (512 blocks) [PART] [0x0000000000040000-0x00000000000BFFFF] "UBOOT" (1024 blocks) [PART] [0x00000000000C0000-0x00000000000FFFFF] "CONFIG" (512 blocks) [PART] [0x0000000000100000-0x000000000013FFFF] "FACTORY" (512 blocks) [PART] [0x0000000000140000-0x000000000213FFFF] "BOOTIMG" (65536 blocks) [PART] [0x0000000002140000-0x000000000413FFFF] "RECOVERY" (65536 blocks) [PART] [0x0000000004140000-0x000000004413FFFF] "ROOTFS" (2097152 blocks) [PART] [0x0000000044140000-0x000001FFC413FFFF] "USER" (-4194304 blocks) [platform_vusb_on] PASS [TOOL] PMIC not dectect usb cable! [TOOL] <UART> listen ended, receive size:0! [TOOL] <UART> wait sync time 150ms->5ms [TOOL] <UART> receieved data: () Device APC domain init setup: bootloader load uboot ,the address of uboot is 81E00000 [PART]partition name UBOOT [PART]partition start block 0x200 [PART]partition size 0x80000 [PART]partition blks 0x400 [PART]partition flags 0x0 [PART]partition name 0x8 [bean] part->startblk(0x200) bdev->blksz(0x200) part->part_id(8) hdr(0xFFB50000) [BlkDev.c 101 ]partition block size 0x200 ,blks:0x76F5000 [BlkDev.c 101 ]partition block erase size 0x200 [PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS] [PART] load speed: 6480KB/s, 524288 bytes, 79ms [BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102 0:dram_rank_size:80000000 [PLFM] md_type[0] = 255 [PLFM] md_type[1] = 255 [PLFM] boot reason: 0 [PLFM] boot mode: 0 [PLFM] META COM0: 0 [PLFM] <0xFFB7CC10>: 0x0 [PLFM] boot time: 2965ms [PLFM] DDR reserve mode: enable = 0, success = 0 [BLDR] jump to 0x81E00000 [BLDR] <0x81E00000>=0xEA0000B8 [BLDR] <0x81E00004>=0xE59FF014 U-Boot 2019.10-armbian (Feb 20 2020 - 18:47:04 +0100) CPU: MediaTek MT7623 E3 DRAM: 2 GiB WDT: Started with servicing (60s timeout) MMC: mmc@11230000: 0, mmc@11240000: 1 Loading Environment from EXT4... Card did not respond to voltage select! In: serial Out: serial Err: serial Net: Warning: ethernet@1b100000 (eth0) using random MAC address - 3e:50:2f:69:bc:f9 eth0: ethernet@1b100000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc1 is current device 1092 bytes read in 2 ms (533.2 KiB/s) Running boot/boot.scr from: mmc 1:1 using boot/boot.scr ## Executing script at 85f80000 Boot script loaded from device 1 78 bytes read in 2 ms (38.1 KiB/s) 27385 bytes read in 5 ms (5.2 MiB/s) 5723079 bytes read in 283 ms (19.3 MiB/s) 8425984 bytes read in 416 ms (19.3 MiB/s) Booting boot/zImage boot/uInitrd boot/dtb/mt7623n-bananapi-bpi-r2.dtb from: mmc 1:1 using bootargs=console=ttyS2,115200n1 root=UUID=9945f9c9-cd23-4f10-8571-95abbfe66759 rw rootf1 Kernel image @ 0x82000000 [ 0x000000 - 0x809200 ] ## Loading init Ramdisk from Legacy Image at 86080000 ... Image Name: uInitrd Image Type: ARM Linux RAMDisk Image (gzip compressed) Data Size: 5723015 Bytes = 5.5 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 86000000 Booting using the fdt blob at 0x86000000 Loading Ramdisk to 8fa8a000, end 8ffff387 ... OK Loading Device Tree to 8fa80000, end 8fa89af8 ... OK Starting kernel ... Loading, please wait... Starting version 241 Begin: Loading essential drivers ... done. Begin: Running /scripts/init-premount ... done. Begin: Mounting root file system ... Begin: Running /scripts/local-top ... done. Begin: Running /scripts/local-premount ... done. Begin: Will now check root file system ... fsck from util-linux 2.33.1 [/sbin/fsck.ext4 (1) -- /dev/mmcblk1p1] fsck.ext4 -a -C0 /dev/mmcblk1p1 /dev/mmcblk1p1: clean, 20874/128016 files, 405989/512000 blocks done. done. Begin: Running /scripts/local-bottom ... done. Begin: Running /scripts/init-bottom ... done. Welcome to Debian GNU/Linux 10 (buster)! [ OK ] Reached target Swap. [ OK ] Listening on Journal Socket (/dev/log). [ OK ] Listening on initctl Compatibility Named Pipe. [ OK ] Started Dispatch Password ��…ts to Console Directory Watch. [ OK ] Listening on Syslog Socket. [ OK ] Listening on udev Control Socket. [ OK ] Created slice User and Session Slice. [ OK ] Reached target Slices. [ OK ] Started Forward Password R��…uests to Wall Directory Watch. [ OK ] Reached target Local Encrypted Volumes. [ OK ] Listening on Journal Socket. Mounting POSIX Message Queue File System... Starting Set the console keyboard layout... Mounting Kernel Debug File System... Starting Journal Service... Starting Restore / save the current clock... Starting Load Kernel Modules... Starting Create list of re��…odes for the current kernel... Starting Nameserver information manager... [ OK ] Listening on fsck to fsckd communication Socket. Starting Remount Root and Kernel File Systems... [ OK ] Reached target Remote File Systems. [ OK ] Created slice system-serial\x2dgetty.slice. [ OK ] Reached target System Time Synchronized. [ OK ] Listening on udev Kernel Socket. Starting udev Coldplug all Devices... [ OK ] Reached target Paths. [ OK ] Mounted POSIX Message Queue File System. [ OK ] Mounted Kernel Debug File System. [ OK ] Started Restore / save the current clock. [ OK ] Started Set the console keyboard layout. [ OK ] Started Load Kernel Modules. [ OK ] Started Journal Service. [ OK ] Started Create list of req��… nodes for the current kernel. [ OK ] Started Remount Root and Kernel File Systems. [ OK ] Started Nameserver information manager. Starting Create System Users... Starting Load/Save Random Seed... Starting Flush Journal to Persistent Storage... Mounting FUSE Control File System... Starting Apply Kernel Variables... Mounting Kernel Configuration File System... [ OK ] Started Load/Save Random Seed. [ OK ] Mounted FUSE Control File System. [ OK ] Started Apply Kernel Variables. [ OK ] Mounted Kernel Configuration File System. [ OK ] Started Create System Users. Starting Create Static Device Nodes in /dev... [ OK ] Started udev Coldplug all Devices. Starting Helper to synchronize boot up for ifupdown... [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Started Helper to synchronize boot up for ifupdown. Starting udev Kernel Device Manager... [ OK ] Reached target Local File Systems (Pre). Mounting /tmp... [ OK ] Mounted /tmp. [ OK ] Reached target Local File Systems. Starting Create Volatile Files and Directories... Starting Set console font and keymap... Starting Raise network interfaces... Starting Armbian ZRAM config... [ OK ] Started udev Kernel Device Manager. [ OK ] Started Set console font and keymap. [ OK ] Started Create Volatile Files and Directories. Starting Update UTMP about System Boot/Shutdown... [ OK ] Found device /dev/ttyS0. [ OK ] Found device /dev/ttyS2. [ OK ] Started Raise network interfaces. [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Started Armbian ZRAM config. [ OK ] Listening on Load/Save RF ��…itch Status /dev/rfkill Watch. Starting Armbian memory supported logging... [ OK ] Started Armbian memory supported logging. [ OK ] Reached target System Initialization. [ OK ] Started Daily rotation of log files. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. Starting Armbian hardware monitoring... [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Started Daily apt download activities. [ OK ] Started Daily apt upgrade and clean activities. [ OK ] Reached target Timers. Starting Armbian hardware optimization... Starting Armbian filesystem resize... [ OK ] Started Armbian hardware monitoring. [ OK ] Started Armbian hardware optimization. [ OK ] Started Armbian filesystem resize. [ OK ] Reached target Basic System. Starting Resets System Activity Data Collector... Starting LSB: Load kernel ��…d to enable cpufreq scaling... [ OK ] Started Armbian first run tasks. [ OK ] Created slice system-getty.slice. Starting System Logging Service... Starting Login Service... [ OK ] Started Regular background program processing daemon. Starting rng-tools.service... [ OK ] Started D-Bus System Message Bus. Starting Network Manager... Starting WPA supplicant... [ OK ] Started System Logging Service. [ OK ] Started Resets System Activity Data Collector. [ OK ] Started rng-tools.service. [ OK ] Started Login Service. [ OK ] Started WPA supplicant. [ OK ] Started LSB: Load kernel m��…ded to enable cpufreq scaling. Starting LSB: set CPUFreq kernel parameters... [ OK ] Started LSB: set CPUFreq kernel parameters. Starting LSB: Set sysfs variables from /etc/sysfs.conf... [ OK ] Started LSB: Set sysfs variables from /etc/sysfs.conf. [ OK ] Started Network Manager. Starting Network Manager Wait Online... [ OK ] Reached target Network. Starting chrony, an NTP client/server... Starting Permit User Sessions... Starting OpenBSD Secure Shell server... [ OK ] Started Permit User Sessions. Starting Hostname Service... [ OK ] Started chrony, an NTP client/server. [ OK ] Started OpenBSD Secure Shell server. [ OK ] Started Hostname Service. Starting Network Manager Script Dispatcher Service... [ OK ] Started Network Manager Script Dispatcher Service. Starting Authorization Manager... [ OK ] Started Network Manager Wait Online. [ OK ] Reached target Network is Online. Starting LSB: Advanced IEEE 802.11 management daemon... Starting /etc/rc.local Compatibility... [ OK ] Started LSB: Advanced IEEE 802.11 management daemon. [ OK ] Started /etc/rc.local Compatibility. [ OK ] Started Authorization Manager. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS2. [ OK ] Reached target Login Prompts. [ OK ] Reached target Multi-User System. [ OK ] Reached target Graphical Interface. Starting Update UTMP about System Runlevel Changes... [ OK ] Started Update UTMP about System Runlevel Changes. Armbian 20.02.2 Buster ttyS2 bananapir2 login: Should these images be removed from the downloads page, as they do not boot? https://dl.armbian.com/bananapir2/archive/Armbian_19.11.3_Bananapir2_bionic_legacy_4.19.85_minimal.7z https://dl.armbian.com/bananapir2/archive/Armbian_19.11.3_Bananapir2_buster_legacy_4.19.85_minimal.7z https://dl.armbian.com/bananapir2/archive/Armbian_20.02.1_Bananapir2_bionic_legacy_4.19.104_minimal.7z https://dl.armbian.com/bananapir2/archive/Armbian_20.02.1_Bananapir2_buster_legacy_4.19.104_minimal.7z cc @chwe @Igor
Igor Posted February 20, 2020 Posted February 20, 2020 On 2/20/2020 at 8:28 PM, Xmoe said: Should these images be removed from the downloads page, as they do not boot? Expand Gone to /dev/null
martinayotte Posted February 20, 2020 Posted February 20, 2020 On 2/20/2020 at 9:05 PM, Igor said: Gone to /dev/null Expand
vobo70 Posted February 24, 2020 Author Posted February 24, 2020 last build: Armbian_20.02.2_Bananapir2_******_legacy_4.19.105_minimal works perfectly (both debian and ubuntu based)
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