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geektillithertz

request for Banana Pi M64

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;--------------------------------------------------------------------------------

 

;   SDMMC PINS MAPPING                                                          |

; ------------------------------------------------------------------------------|

;   Config Guide                                                                |

;   sdc_used: 1-enable card, 0-disable card                                     |

;   non-removable:if you use as main memory,you should set it,for example eMMC  |

;   bus-width: card bus width, 1-1bit, 4-4bit, 8-8bit                           |

;   sunxi-power-save-mode: if use sdio card,should not set it                   |

;   vmmc:regulator for card/emmc power |

;    vqmmc:regulator for card/emmc io power |

;    vdmmc:regulator for card detect pin pull up power |

;   other: GPIO Mapping configuration                                           |

; ------------------------------------------------------------------------------|

 

[pmu0_regu]


regulator_count = 23

regulator1      = "axp81x_dcdc1 none vcc-nand vcc-emmc vcc-sdc vcc-usb-30 vcc-io vcc-emmcv vcc-emmcvq33 vcc-sdcvq33 vcc-sdcv vcc-sdcvd"


regulator16     = "axp81x_eldo1 none vcc-cpvdd vcc-pc vcc-emmcvq18"

 

[sdc2]

sdc2_used          = 1

non-removable =

bus-width = 8

sdc2_ds            = port:PC01<3><1><3><default>

sdc2_clk           = port:PC05<3><1><3><default>

sdc2_cmd           = port:PC06<3><1><3><default>

sdc2_d0            = port:PC08<3><1><3><default>

sdc2_d1            = port:PC09<3><1><3><default>

sdc2_d2            = port:PC10<3><1><3><default>

sdc2_d3            = port:PC11<3><1><3><default>

sdc2_d4            = port:PC12<3><1><3><default>

sdc2_d5            = port:PC13<3><1><3><default>

sdc2_d6            = port:PC14<3><1><3><default>

sdc2_d7            = port:PC15<3><1><3><default>

sdc2_emmc_rst      = port:PC16<3><1><3><default>

cd-gpios   =

sunxi-power-save-mode = 

sunxi-dis-signal-vol-sw = 

mmc-ddr-1_8v   =

mmc-hs200-1_8v   =

mmc-hs400-1_8v   =

max-frequency   = 100000000

sdc_tm4_sm0_freq0 = 0

sdc_tm4_sm0_freq1 = 0

sdc_tm4_sm1_freq0 = 0x00000000

sdc_tm4_sm1_freq1 = 0

sdc_tm4_sm2_freq0 = 0x00000000

sdc_tm4_sm2_freq1 = 0

sdc_tm4_sm3_freq0 = 0x05000000

sdc_tm4_sm3_freq1 = 0x00000405

sdc_tm4_sm4_freq0 = 0x00050000

sdc_tm4_sm4_freq1 = 0x00000408

vmmc="vcc-emmcv"

;vqmmc="vcc-emmcvq33"

vqmmc="vcc-emmcvq18"

vdmmc="none"

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That is what i have set on DTS. The only missing thing is i have forgotten to update regulator count...... fixing and crossing my fingers.

 

BTW max-frequency   = 100000000 is wrong according to Android log!

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I am curious, Android is 3.10.65, 3.10 should not be using DTB? All leaked SDK BSP for 3.10 i have seen converts the fex to dtb.

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I failed to figured out how this arch=arm u-boot would deal with eMMC.

 

a few notes:

* from leaked BSP, u-boot has some changes and is arch=aarch64

* i failed to understand the role of this BOOT0 => u-boot => kernel in the whole process, specifically this new change:

extern int mmc_config_addr; /*extern const boot0_file_head_t BT0_head;*/

Maybe:

* BOOT0 has some specific instructions to deal with eMMC, maybe a new/specific BOOT0 is needed for the eMMC

* this new U-BOOT (arch=aarch64) is needed to pass additional info (or the correct info) through mmc_config_addr that BT0_head can't.

 

I don't have enough experience with u-boot to find out how to assembly or fix this, unfortunately.

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/*

 -- speed mode --

sm0: DS26_SDR12

sm1: HSSDR52_SDR25

sm2: HSDDR52_DDR50

sm3: HS200_SDR104

sm4: HS400

 

-- frequency point --

f0: CLK_400K

f1: CLK_25M

f2: CLK_50M

f3: CLK_100M

f4: CLK_150M

f5: CLK_200M

*/

/* some information is passed in boot0's extend data buffer: BT0_head.prvt_head.storage_data

    these information is write to BT0_head.prvt_head.storage_data before write boot0 during product.

    1. BT0_head.prvt_head.storage_data + 128 Byte

        +0 struct tune_sdly

    2. BT0_head.prvt_head.storage_data + 128 + sizeof(struct tune_sdly) Byte

        +0 Byte: boot0_para

        +1 Byte: boot_odly_50M

        +2 Byte: boot_sdly_50M

        +3 Byte: boot_odly_50M_ddr

        +4 Byte: boot_sdly_50M_ddr

        +5 Byte: boot_hs_f_max

*/

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I had not noticed this code before, we purposely used the same eMMC that is in the Allwinner reference design.  So our eMMC just worked without needing any code changes.  (that's why I don't know much about the eMMC code)

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So our eMMC just worked without needing any code changes.  (that's why I don't know much about the eMMC code)

 

That is interesting.

 

Please Jon, which u-boot are you using? And what kernel?

 

The Android build use 64 bit U-boot (aarch64), longsleep's U-Boot is 32 bit (arm).

Android mmc driver is 0.37 and longsleep's mmc driver is 0.20 something.

 

Android detects the eMMC as this: 

[    2.686594] mmc0: new high speed DDR MMC card at address 0001
[    2.704671] mmcblk0: mmc0:0001 8WPD3R 7.28 GiB 

Linux detects the eMMC as:

[   11.804689] mmc0: new HS400 MMC card at address 0001
[   11.894501] mmcblk0: mmc0:0001 8WPD3R 7.28 GiB 

My understanding is it should switch to DDR mode.

 

Android DTB has max-frequency   = 100000000 that i thought it was wrong just because when i limited to 50000000 it worked momentaneously but with errors: https://gist.github.com/avafinger/04c5a56cbe66e95b18edf218ec7e4073#file-linux_emmc_error

and you can see the Android max Hz is 50000000

 

It would be just to rebuild the U-boot and append the DTB with the eMMC enabled and create the same DTB for the kernel. Just as @tkaiser pointed.

Also interesting i failed to find where :

extern int mmc_config_addr; (New U-Boot)  or extern const boot0_file_head_t BT0_head; (Old U-Boot)

 is defined, so i could have a chance to understand a bit more. Sorry if this sounds a little noob.

 

 

I will give it a try one more time.... Maybe i worked so hard this weekend that i got confused :D

 

 

 

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And BTW: Pinebook has also eMMC so you might want to have a look into ayufan's PR from yesterday here: https://github.com/longsleep/build-pine64-image/commits/master

 

Things are evolving fast. But how this is supposed to work? vqmmc = "vcc-lpddr"; . There is no vcc-lpddr in the ayufan's DTS. Looks like it is from Olimex.

 

If i can build the new u-boot from the Android or use their work sounds good to me.

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shell@tulip-bpi-m64:/ $ 

shell@tulip-bpi-m64:/ $ 
shell@tulip-bpi-m64:/ $ dmesg | grep mmc                                       
[    0.000000] Kernel command line: earlyprintk=sunxi-uart,0x01c28000 initcall_debug=0 console=ttyS0,115200 loglevel=8 root=/dev/mmcblk0p7 init=/init partitions=bootloader@mmcblk0p2:env@mmcblk0p5:boot@mmcblk0p6:system@mmcblk0p7:verity_block@mmcblk0p8:misc@mmcblk0p9:recovery@mmcblk0p10:cache@mmcblk0p11:metadata@mmcblk0p12:private@mmcblk0p13:frp@mmcblk0p14:empty@mmcblk0p15:alog@mmcblk0p16:media_data@mmcblk0p17:UDISK@mmcblk0p1 cma=256M androidboot.selinux=enforcing androidboot.serialno=0410503444104420048e androidboot.hardware=sun50iw1p1 boot_type=2 androidboot.verifiedbootstate=<NULL> androidboot.sunxi_rotpk=<NULL>
[    2.249755] sunxi-mmc 1c11000.sdmmc: SD/MMC/SDIO Host Controller Driver(v0.37 2015-11-9 15:13) Compiled in Sep 13 2016 at 18:51:56
[    2.262868] sunxi-mmc 1c11000.sdmmc: regulator prop vmmc,str vcc-emmcv
[    2.270132] sunxi-mmc 1c11000.sdmmc: regulator prop vqmmc,str vcc-emmcvq18
[    2.277643] sunxi-mmc 1c11000.sdmmc: regulator prop vdmmc,str none
[    2.284816] sunxi-mmc 1c11000.sdmmc: No vdmmc regulator found
[    2.312366] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 0Hz bm PP pm UP vdd 22 width 1 timing LEGACY(SDR12) dt B
[    2.350027] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 22 width 1 timing LEGACY(SDR12) dt B
[    2.380049] sunxi-mmc 1c11000.sdmmc: base:0xffffff80000b8000 irq:94
[    2.380863] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 52, RTO !!
[    2.381696] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 52, RTO !!
[    2.381714] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 22 width 1 timing LEGACY(SDR12) dt B
[    2.384118] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 22 width 1 timing LEGACY(SDR12) dt B
[    2.385984] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 8, RTO !!
[    2.386811] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 5, RTO !!
[    2.387636] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 5, RTO !!
[    2.388461] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 5, RTO !!
[    2.389286] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 5, RTO !!
[    2.390114] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 55, RTO !!
[    2.390941] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 55, RTO !!
[    2.391768] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 55, RTO !!
[    2.392596] sunxi-mmc 1c11000.sdmmc: smc 0 p2 err, cmd 55, RTO !!
[    2.392614] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm OD pm ON vdd 22 width 1 timing LEGACY(SDR12) dt B
[    2.392967] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm OD pm ON vdd 7 width 1 timing LEGACY(SDR12) dt B
[    2.393011] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm OD pm ON vdd 7 width 1 timing LEGACY(SDR12) dt B
[    2.393051] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm OD pm ON vdd 7 width 1 timing LEGACY(SDR12) dt B
[    2.395448] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm OD pm ON vdd 7 width 1 timing LEGACY(SDR12) dt B
[    2.411207] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 7 width 1 timing LEGACY(SDR12) dt B
[    2.422758] mmc0: BKOPS_EN bit is not set
[    2.557926] sunxi-mmc 1c0f000.sdmmc: SD/MMC/SDIO Host Controller Driver(v0.37 2015-11-9 15:13) Compiled in Sep 13 2016 at 18:51:56
[    2.571002] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 7 width 1 timing MMC-HS(SDR20) dt B
[    2.571033] sunxi-mmc 1c0f000.sdmmc: regulator prop vmmc,str vcc-sdcv
[    2.571041] sunxi-mmc 1c0f000.sdmmc: regulator prop vqmmc,str vcc-sdcvq33
[    2.571047] sunxi-mmc 1c0f000.sdmmc: regulator prop vdmmc,str vcc-sdcvd
[    2.604729] mmc0: Check switch ready sunxi_mmc_check_timing_switch_done
[    2.619988] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 50000000Hz bm PP pm ON vdd 7 width 1 timing MMC-HS(SDR20) dt B
[    2.631874] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 50000000Hz bm PP pm ON vdd 7 width 8 timing MMC-HS(SDR20) dt B
[    2.631875] sunxi-mmc 1c0f000.sdmmc: Got CD GPIO #166.
[    2.649620] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 50000000Hz bm PP pm ON vdd 7 width 8 timing UHS-DDR50 dt B
[    2.649623] sunxi-mmc 1c0f000.sdmmc: base:0xffffff80000c0000 irq:92
[    2.650092] sunxi-mmc 1c10000.sdmmc: SD/MMC/SDIO Host Controller Driver(v0.37 2015-11-9 15:13) Compiled in Sep 13 2016 at 18:51:56
[    2.650128] sunxi-mmc 1c10000.sdmmc: Can't get vmmc regulator string
[    2.650133] sunxi-mmc 1c10000.sdmmc: Can't get vqmmc regulator string
[    2.650138] sunxi-mmc 1c10000.sdmmc: Can't get vdmmc regulator string
[    2.650147] sunxi-mmc 1c10000.sdmmc: No vmmc regulator found
[    2.650150] sunxi-mmc 1c10000.sdmmc: No vqmmc regulator found
[    2.650154] sunxi-mmc 1c10000.sdmmc: No vdmmc regulator found
[    2.733253] sunxi-mmc 1c11000.sdmmc: sdc set ios: clk 50000000Hz bm PP pm ON vdd 7 width 8 timing UHS-DDR50 dt B
[    2.744701] mmc0: new high speed DDR MMC card at address 0001
[    2.745087] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 0Hz bm PP pm UP vdd 21 width 1 timing LEGACY(SDR12) dt B
[    2.745106] sunxi-mmc 1c10000.sdmmc: no vqmmc,Check if there is regulator
[    2.760031] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    2.780064] sunxi-mmc 1c10000.sdmmc: base:0xffffff80000c8000 irq:93
[    2.790661] mmcblk0: mmc0:0001 8WPD3R 7.28 GiB 
[    2.802547] mmcblk0boot0: mmc0:0001 8WPD3R partition 1 4.00 MiB
[    2.809875] mmcblk0boot1: mmc0:0001 8WPD3R partition 2 4.00 MiB
[    2.854067]  mmcblk0: p1 p2 p3 < p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 p16 p17 >
[    2.854092] mmcblk0: p1 size 8937472 extends beyond EOD, truncated
[    2.885206]  mmcblk0boot1: unknown partition table
[    2.895855]  mmcblk0boot0: unknown partition table
[    2.896216] *mmc0 lock timeout*
[    2.990859] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 52, RTO !!
[    2.998532] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 52, RTO !!
[    3.005400] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    3.019480] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    3.021363] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 8, RTO !!
[    3.022184] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 5, RTO !!
[    3.023004] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 5, RTO !!
[    3.023821] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 5, RTO !!
[    3.024639] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 5, RTO !!
[    3.025461] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 55, RTO !!
[    3.026279] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 55, RTO !!
[    3.027099] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 55, RTO !!
[    3.027916] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 55, RTO !!
[    3.027932] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm OD pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    3.028780] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 1, RTO !!
[    3.028796] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 0Hz bm OD pm OFF vdd 0 width 1 timing LEGACY(SDR12) dt B
[    3.029845] *mmc2 unlock*
[    5.201722] EXT4-fs (mmcblk0p7): mounted filesystem with ordered data mode. Opts: barrier=1
[    5.211085] SELinux: initialized (dev mmcblk0p7, type ext4), uses xattr
[    5.228724] EXT4-fs (mmcblk0p11): Ignoring removed nomblk_io_submit option
[    5.245118] EXT4-fs (mmcblk0p11): mounted filesystem with ordered data mode. Opts: nomblk_io_submit,errors=remount-ro
[    5.256936] SELinux: initialized (dev mmcblk0p11, type ext4), uses xattr
[    5.385313] EXT4-fs (mmcblk0p11): Ignoring removed nomblk_io_submit option
[    5.401142] EXT4-fs (mmcblk0p11): mounted filesystem with ordered data mode. Opts: barrier=1,data=ordered,nomblk_io_submit,noauto_da_alloc,errors=panic
[    5.416260] SELinux: initialized (dev mmcblk0p11, type ext4), uses xattr
[    5.433400] EXT4-fs (mmcblk0p16): Ignoring removed nomblk_io_submit option
[    5.445618] EXT4-fs (mmcblk0p16): mounted filesystem with ordered data mode. Opts: nomblk_io_submit,errors=remount-ro
[    5.457439] SELinux: initialized (dev mmcblk0p16, type ext4), uses xattr
[    5.526303] EXT4-fs (mmcblk0p16): Ignoring removed nomblk_io_submit option
[    5.538630] EXT4-fs (mmcblk0p16): mounted filesystem with ordered data mode. Opts: barrier=1,data=ordered,nomblk_io_submit,noauto_da_alloc,errors=panic
[    5.553771] SELinux: initialized (dev mmcblk0p16, type ext4), uses xattr
[    5.570853] EXT4-fs (mmcblk0p1): VFS: Can't find ext4 filesystem
[    5.720117] EXT4-fs (mmcblk0p1): VFS: Can't find ext4 filesystem
[    5.795973] FAT-fs (mmcblk0p17): bogus number of reserved sectors
[    5.802776] FAT-fs (mmcblk0p17): Can't find a valid FAT filesystem
[    8.507452] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 0Hz bm PP pm UP vdd 21 width 1 timing LEGACY(SDR12) dt B
[    8.518640] sunxi-mmc 1c10000.sdmmc: no vqmmc,Check if there is regulator
[    8.540024] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    8.570836] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 52, RTO !!
[    8.578424] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 52, RTO !!
[    8.585096] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    8.599197] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 21 width 1 timing LEGACY(SDR12) dt B
[    8.612652] sunxi-mmc 1c10000.sdmmc: smc 2 p1 err, cmd 8, RTO !!
[    8.619645] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 16 width 1 timing LEGACY(SDR12) dt B
[    8.640354] mmc2: queuing unknown CIS tuple 0x80 (2 bytes)
[    8.647965] mmc2: queuing unknown CIS tuple 0x80 (3 bytes)
[    8.655577] mmc2: queuing unknown CIS tuple 0x80 (3 bytes)
[    8.664435] mmc2: queuing unknown CIS tuple 0x80 (7 bytes)
[    8.756550] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 400000Hz bm PP pm ON vdd 16 width 1 timing SD-HS(SDR25) dt B
[    8.768100] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 50000000Hz bm PP pm ON vdd 16 width 1 timing SD-HS(SDR25) dt B
[    8.779892] sunxi-mmc 1c10000.sdmmc: sdc set ios: clk 50000000Hz bm PP pm ON vdd 16 width 4 timing SD-HS(SDR25) dt B
[    8.792924] mmc2: new high speed SDIO card at address 0001
[    8.801771] *mmc2 lock timeout*
[    8.823535] bcmsdh_sdmmc: bcmsdh_sdmmc_probe Enter
[    8.828845] bcmsdh_sdmmc: bcmsdh_sdmmc_probe Enter
[    9.233650] type=1400 audit(1484013113.200:4): avc: denied { execute_no_trans } for pid=1688 comm="init" path="/system/bin/sh" dev="mmcblk0p7" ino=451 scontext=u:r:init:s0 tcontext=u:object_r:shell_exec:s0 tclass=file permissive=0
[    9.352501] FAT-fs (mmcblk0p2): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
[    9.363868] SELinux: initialized (dev mmcblk0p2, type vfat), uses genfs_contexts
shell@tulip-bpi-m64:

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Hi @jonsmirl,

 

Thanks for the info, it is the same log as i have. Now i know the problem is at my side.

I will redo everything, and triple check again....

 

Please, can you do a boot from eMMC with an SD CARD (blank) inserted? I just want to make sure this is possible because i am booting from SD CARD with eMMC enabled on kernel only, just as i did with M2U, and then format the eMMC.

I also did not enabled eMMC in u-boot, that could also be the problem.

 

Hope i can find what i did wrong.

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I have verified that the kernel inside of this:

https://drive.google.com/open?id=0B_YnvHgh2rwjaVVMSi1xU1ZOY2c

 

Builds, loads into the M64 eMMC using PhoenixCard, and will boot out of the eMMC.

That is a recent Android 6.01 dump from Allwinner with M64 support added in.

 

I will start turning it back into a repo (it started out as a repo and the middlemen removed the repo support) based on AOSP and load the git trees on gitlab. It is going to take me a couple of days to turn it back into a repo. Meanwhile you can download it and extract the working eMMC driver from it.

 

The M64 eMMC wants to run in DDR mode. The older kernel in my Pine64 Android 5.1 does not have working eMMC DDR support in it.

 

PS - the build tools were moved from that dump, you will have to add them back in.

PPS - running pack on the Android side does not generate a valid image, in lichee './build.sh pack' does.

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The M64 eMMC wants to run in DDR mode. The older kernel in my Pine64 Android 5.1 does not have working eMMC DDR support in it.

 

That's exactly the issue.

 

I have updated the mmc driver in kernel and u-boot and still not switching to DDR mode,  :mellow:

If anyone wants to try out here are the changes: https://github.com/avafinger/u-boot-m64 

 

Still thinking we need a new BOOT0 to do something.

 

Can you save from your debugging build the complete  BOOT0 log and also u-boot?

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Today I managed to get eMMC working, finally!

 

At the moment rootfs is in SD CARD and i can use eMMC for storage, booting from eMMC may be another story.

I updated the drivers, doubled checked, triple checked, again and again and again.... There are some DTB pins configuration i missed, seems like related to USB, may be this power up eMMC somehow (never mind, it is just a guess).

With Android DTS/DTB the board crashes most likely due to mali/gpu configuration.

 

If i can boot from eMMC with my dirty hack (is not a solution) i share my experiments.

 

Anyway, u-boot with new driver is here: https://github.com/avafinger/u-boot-m64, this may also work for the upcoming Pine64 / NanoPi A64 with eMMC, well, hope so!

 

post-957-0-21475900-1484840773_thumb.png

 

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I just fixed the defunct GbE, it now works with correct configuration. So it was not broken, just did not work with the Pine64 GbE configuration.

 

So you want numbers?

 

GbE test:

ubuntu@apps:~$ iperf3 -c 192.168.254.3
Connecting to host 192.168.254.3, port 5201
[  4] local 192.168.254.99 port 33453 connected to 192.168.254.3 port 5201
[ ID] Interval           Transfer     Bandwidth       Retr  Cwnd
[  4]   0.00-1.01   sec   102 MBytes   851 Mbits/sec    0    530 KBytes       
[  4]   1.01-2.00   sec  99.4 MBytes   835 Mbits/sec    2    161 KBytes       
[  4]   2.00-3.00   sec  99.5 MBytes   834 Mbits/sec    0    223 KBytes       
[  4]   3.00-4.01   sec  99.8 MBytes   834 Mbits/sec    0    260 KBytes       
[  4]   4.01-5.01   sec   101 MBytes   845 Mbits/sec    0    293 KBytes       
[  4]   5.01-6.00   sec  99.4 MBytes   838 Mbits/sec    0    314 KBytes       
[  4]   6.00-7.01   sec   102 MBytes   849 Mbits/sec    2    223 KBytes       
[  4]   7.01-8.00   sec  98.0 MBytes   828 Mbits/sec    0    246 KBytes       
[  4]   8.00-9.00   sec   100 MBytes   841 Mbits/sec    0    270 KBytes       
[  4]   9.00-10.00  sec   101 MBytes   849 Mbits/sec    0    303 KBytes       
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bandwidth       Retr
[  4]   0.00-10.00  sec  1002 MBytes   840 Mbits/sec    4             sender
[  4]   0.00-10.00  sec  1002 MBytes   840 Mbits/sec                  receiver

iperf Done.
ubuntu@apps:/home$ iperf3 -s
-----------------------------------------------------------
Server listening on 5201
-----------------------------------------------------------
Accepted connection from 192.168.254.3, port 59134
[  5] local 192.168.254.99 port 5201 connected to 192.168.254.3 port 59135
[ ID] Interval           Transfer     Bandwidth
[  5]   0.00-1.00   sec   103 MBytes   861 Mbits/sec                  
[  5]   1.00-2.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   2.00-3.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   3.00-4.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   4.00-5.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   5.00-6.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   6.00-7.00   sec   112 MBytes   935 Mbits/sec                  
[  5]   7.00-8.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   8.00-9.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   9.00-10.00  sec   112 MBytes   941 Mbits/sec                  
[  5]  10.00-10.05  sec  5.48 MBytes   941 Mbits/sec                  
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bandwidth       Retr
[  5]   0.00-10.05  sec  1.09 GBytes   933 Mbits/sec    0             sender
[  5]   0.00-10.05  sec  1.09 GBytes   933 Mbits/sec                  receiver
-----------------------------------------------------------
Server listening on 5201
-----------------------------------------------------------
Accepted connection from 192.168.254.3, port 59146
[  5] local 192.168.254.99 port 5201 connected to 192.168.254.3 port 59147
[ ID] Interval           Transfer     Bandwidth
[  5]   0.00-1.00   sec   107 MBytes   895 Mbits/sec                  
[  5]   1.00-2.00   sec   112 MBytes   939 Mbits/sec                  
[  5]   2.00-3.00   sec   112 MBytes   938 Mbits/sec                  
[  5]   3.00-4.00   sec   112 MBytes   940 Mbits/sec                  
[  5]   4.00-5.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   5.00-6.00   sec   112 MBytes   937 Mbits/sec                  
[  5]   6.00-7.00   sec   112 MBytes   940 Mbits/sec                  
[  5]   7.00-8.00   sec   112 MBytes   941 Mbits/sec                  
[  5]   8.00-9.00   sec   112 MBytes   940 Mbits/sec                  
[  5]   9.00-10.00  sec   112 MBytes   941 Mbits/sec                  
[  5]  10.00-10.04  sec  4.16 MBytes   933 Mbits/sec                  
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval           Transfer     Bandwidth       Retr
[  5]   0.00-10.04  sec  1.09 GBytes   936 Mbits/sec    2             sender
[  5]   0.00-10.04  sec  1.09 GBytes   935 Mbits/sec                  receiver
-----------------------------------------------------------
Server listening on 5201
-----------------------------------------------------------
^Ciperf3: interrupt - the server has terminated

And the numbers for the eMMC (whatever that means):

	Command line used: ./iozone -e -I -a -s 10m -r 4k -r 16k -r512k -i 0 -i 1 -i 2
	Output is in kBytes/sec
	Time Resolution = 0.000001 seconds.
	Processor cache size set to 1024 kBytes.
	Processor cache line size set to 32 bytes.
	File stride size set to 17 * record size.
                                                              random    random     bkwd    record    stride                                    
              kB  reclen    write  rewrite    read    reread    read     write     read   rewrite      read   fwrite frewrite    fread  freread
           10240       4     6498     6823    18577    18653    18610     6893                                                                
           10240      16    22970    24870    43526    43570    43358    24499                                                                
           10240     512    39550    38991    80905    81040    80904    38332                                                                

Chances are that i can get Wifi/BT to work with LXDE, will push the DTB to github if i succeed.

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I have now Banana Pi M64 booting from eMMC with OV5640, Wifi and GbE working with the correct settings for the board. BT not tested but i think is working also.

I will revert the dirty hack that made possible to boot from SD card and format eMMC and use as storage and confirm.

 

Anyways, if it was just the wrong settings i pushed  the correct setting for the BPI-M64 on github in case someone wish to support this board. 

DTB settings: https://github.com/avafinger/dtb_bpi-m64

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I have now Banana Pi M64 booting from eMMC with OV5640, Wifi and GbE working with the correct settings for the board. BT not tested but i think is working also.

 

So we could (shall we?) add it to the build system? I assume the rest is the same as for Pine64?

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Yes. I just need to confirm that dirty hack is not needed here (i bypassed the eMMC detection and hardcoded some settings) .

 

Things to note:

* eMMC is card #2 instead of card #0

* updated the mmc driver in u-boot

 

Do you have this board with you?

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Nope, don't have it.

 

To give full support is important to have the board on your desk, hope they send you one. Manufacturer has been supportive in some ways, Foxconn (bpi-m64) and FriendlyArm (NanoPi A64 is on the way), and Tllim sent me the Himax HM5065 camera sensor (not the actual Samsung s5k4ec sensor) that is already working with Pine64+ here and i will post my findings when possible.

 

We will need help from the users. So if you can prepare and build a preliminary Image i can test it and others too.

 

Let's begin then, I did it in my way so please adjust it to the build system:

 

a) Pull / Patch from new https://github.com/avafinger/u-boot-m64, this is needed for the eMMC.

B) Unfortunately the dirty hack is still needed in my case, maybe because i updated the mmc driver for the old kernel 3.10.102 with my stuff, and latest 3.10.104 has a new driver and we could use the latest kernel. We will try first without the dirty hack and if it does not work we update the mmc kernel driver.

c) I will push the Kernel Config to github

d) Will push the Ampak firmware to github (wifi/BT)

e) Post the correct u-boot environment to boot from eMMC and SD CARD

 

Should we proceed?

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