Orange PI Zero Plus CPU frequency problem

[Darkyere]

Armbianmonitor:

http://ix.io/1ZWJ

About 3 months ago i bought the Orange PI Zero Plus

 

Orange Pi Zero Plus

 

I installed Armbian Stretch and started playing around.

 

I noticed that it got up to 71c which was to much so i shut it down and went on the net to buy some 5v fans to cool it.

 

A month ago I received the first fans and noticed now that Armbian Buster had arrived. Since I hadn't gotten far with the config of Armbian Stretch I started on a new image.

 

But to my disappointment the ARM processor is now clocked to 1008Mhz and not the 1.2Ghz the device is set to by manufacturer. I can guess that it is because of the heat problem that it is now set to 1008Mhz.

 

The problem is through armbian-config there is no longer any an 1.2Ghz option only 1008Mhz .

 

And setting

 

nano /etc/default/cpufrequtils

service cpufrequtils restart

 

Doesn't change the actual speed from 1Ghz to 1.2Ghz

 

Some info

 

My kernel is

 

uname -a

Linux orangepizeroplus 4.19.63-sunxi64 #5.92 SMP Fri Aug 2 00:18:27 CEST 2019 aarch64 GNU/Linux

 

My /etc/default/cpufrequtils looks like

 

# WARNING: this file will be replaced on board support package (linux-root-...) upgrade
ENABLE=true
MIN_SPEED=480000
MAX_SPEED=1010000
GOVERNOR=ondemand

 

And cpufreq-info shows

 

hardware limits: 120 MHz - 1.01 GHz
available frequency steps: 120 MHz, 240 MHz, 480 MHz, 648 MHz, 816 MHz, 960 MHz, 1.01 GHz

 

I suppose it's the kernel which decides what is allowed. And I do get that it will keep the heat down and that setting it to 1008Mhz as default is a good idea.

 

But I was hoping to get the option back to choose 1.2Ghz even if it should default to 1008Mhz now where I have bought both 5v fans and NPN transistors to make a little ARM fan for my OPZ+.

 

Ty for reading and best regards,
Darkyere

[Igor]

21 hours ago, Darkyere said:

I noticed that it got up to 71c which was to much so i shut it down and went on the net to buy some 5v fans to cool it.

 

Early versions had broken thermal throttling.

 

21 hours ago, Darkyere said:

But to my disappointment the ARM processor is now clocked to 1008Mhz and not the 1.2Ghz the device is set to by manufacturer. I can guess that it is because of the heat problem that it is now set to 1008Mhz.

 

IMO this is just a bug. If bits for voltage regulator or voltage regulator are missing/are wrong, those are fallback values. We also have overlays for regulators, so you can try enabling them -> armbian-config -> hardware (in case you end up with bootless image, remove overlay bits from /boot/armbianEnv.txt)

[Darkyere]

It is great to hear that it is not the kernel and that a solution might be available already now.

 

So if I get it correctly I go into 

 

armbian-config > software > hardware

# And enable

gpio-regulator-1.3v

 

That is the only option in that category that has something related to regulator.

And if you say that is the one I will enable it and reboot.

 

I appreciate the quick respond. Unfortunately I wont be home until Wednesday so I wont be able to really test it until then.

 

Not taking any chances and risking to make it unbootable with 48 hours till I can physically access it

[Igor]

On 10/28/2019 at 5:19 PM, Darkyere said:

That is the only option in that category that has something related to regulator.

And if you say that is the one I will enable it and reboot.

Yes, that's it.

It works on a similar board:
https://github.com/armbian/build/commit/09341a28e5d962836cbfd79d383cbdccd16a0ae7

but yes, rather do such things when you have access to hw.

[Darkyere]

I changed it and my /boot/armbianEnv.txt added

 

overlays=gpio-regulator-1.3v usbhost2 usbhost3

And i felt happy that it rebooted an is running with this new setting.

 

But unfortuantely the bord is still maximum clocked at 1008Mhz.

 

Changing /etc/default/cpufrequtils doenst help

 

and going into armbian-config doesnt give me higher options but 1008Mhz

 

Do you have any clue what could be the reason?

And what our next step would be ?

[guidol]

28 minutes ago, Darkyere said:

I changed it and my /boot/armbianEnv.txt added

 

overlays=gpio-regulator-1.3v usbhost2 usbhost3

Do you have any clue what could be the reason?

And what our next step would be ?

@Darkyere try the following overlays-line:

overlays=cpu-clock-1.3GHz-1.3v gpio-regulator-1.3v usbhost2 usbhost3

1200Mhz needs a higher voltage than 1008Mhz:

                opp-1008000000 {
                        opp-hz = < 0x00 0x3c14dc00 >;
                        opp-microvolt = < 0x124f80 0x124f80 0x13d620 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

                opp-1104000000 {
                        opp-hz = < 0x00 0x41cdb400 >;
                        opp-microvolt = < 0x142440 0x142440 0x142440 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

                opp-1200000000 {
                        opp-hz = < 0x00 0x47868c00 >;
                        opp-microvolt = < 0x142440 0x142440 0x142440 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };
 

The 2 overlays should make it work, if your board supports the gpio-regulator

[Darkyere]

Unfortunately my device froze on next reboot and i had to delete the overlay from the armbianEnv.txt file.

 

It's just weird i don't seem to be the only one who have had this issue with a OPIZ+ looking through the net i found

 

OrangePi PC CPU Frequency

 

Where at the bottom of the post one like me originally had 1200Mhz and after kernel update got 1008Mhz.

 

Is it possible its related to something else ?

 

Boot info from TTL looked like

U-Boot SPL 2019.04-armbian (Jul 16 2019 - 11:01:14 +0200)
DRAM: 512 MiB
Trying to boot from MMC1
NOTICE:  BL31: v2.1(debug):3ce3ce0-dirty
NOTICE:  BL31: Built : 17:00:24, Jul 15 2019
NOTICE:  BL31: Detected Allwinner H5 SoC (1718)
NOTICE:  BL31: Found U-Boot DTB at 0x40899e0, model: Xunlong Orange Pi Zero Plus
INFO:    ARM GICv2 driver initialized
INFO:    Configuring SPC Controller
NOTICE:  BL31: PMIC: Defaulting to PortL GPIO according to H5 reference design.
INFO:    BL31: Platform setup done
INFO:    BL31: Initializing runtime services
INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x4a000000
INFO:    SPSR = 0x3c9


U-Boot 2019.04-armbian (Jul 16 2019 - 11:01:14 +0200) Allwinner Technology

CPU:   Allwinner H5 (SUN50I)
Model: Xunlong Orange Pi Zero Plus
DRAM:  512 MiB
MMC:   mmc@1c0f000: 0, mmc@1c11000: 1
Loading Environment from EXT4... ** File not found /boot/boot.env **

** Unable to read "/boot/boot.env" from mmc0:1 **
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
** Reading file would overwrite reserved memory **
There is no valid bmp file at the given address
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found
Autoboot in 1 seconds, press <Space> to stop
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
Found U-Boot script /boot/boot.scr
3042 bytes read in 2 ms (1.5 MiB/s)
## Executing script at 4fc00000
U-boot loaded from SD
Boot script loaded from mmc
236 bytes read in 1 ms (230.5 KiB/s)
28217 bytes read in 10 ms (2.7 MiB/s)
898 bytes read in 5 ms (174.8 KiB/s)
Applying kernel provided DT overlay sun50i-h5-cpu-clock-1.3GHz-1.3v.dtbo
1020 bytes read in 4 ms (249 KiB/s)
Applying kernel provided DT overlay sun50i-h5-gpio-regulator-1.3v.dtbo
504 bytes read in 4 ms (123 KiB/s)
Applying kernel provided DT overlay sun50i-h5-usbhost2.dtbo
504 bytes read in 4 ms (123 KiB/s)
Applying kernel provided DT overlay sun50i-h5-usbhost3.dtbo
4155 bytes read in 3 ms (1.3 MiB/s)
Applying kernel provided DT fixup script (sun50i-h5-fixup.scr)
## Executing script at 44000000
7867316 bytes read in 386 ms (19.4 MiB/s)
14311432 bytes read in 699 ms (19.5 MiB/s)
## Loading init Ramdisk from Legacy Image at 4fe00000 ...
   Image Name:   uInitrd
   Image Type:   AArch64 Linux RAMDisk Image (gzip compressed)
   Data Size:    7867252 Bytes = 7.5 MiB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 4fa00000
   Booting using the fdt blob at 0x4fa00000
   Loading Ramdisk to 4987f000, end 49fffb74 ... OK
   Loading Device Tree to 000000004980f000, end 000000004987efff ... OK

Starting kernel ...

Loading, please wait...
Starting version 241
Begin: Loading essential drivers ... done.
Begin: Running /scripts/init-premount ... done.
Begin: Mounting root file system ... Begin: Running /scripts/local-top ... done.
Begin: Running /scripts/local-premount ... Scanning for Btrfs filesystems
done.
Begin: Will now check root file system ... fsck from util-linux 2.33.1
[/sbin/fsck.ext4 (1) -- /dev/mmcblk0p1] fsck.ext4 -a -C0 /dev/mmcblk0p1
/dev/mmcblk0p1: recovering journal
/dev/mmcblk0p1: clean, 56098/936448 files, 586337/3839744 blocks
done.
done.
Begin: Running /scripts/local-bottom ... done.
Begin: Running /scripts/init-bottom ... done.

Welcome to Debian GNU/Linux 10 (buster)!

[  OK  ] Created slice system-getty.slice.
[  OK  ] Listening on Journal Socket.
         Starting Nameserver information manager...
[  OK  ] Reached target Remote File Systems.
[  OK  ] Created slice User and Session Slice.
[  OK  ] Started Forward Password R…uests to Wall Directory Watch.
[  OK  ] Reached target Slices.
[  OK  ] Reached target System Time Synchronized.
         Mounting Huge Pages File System...
         Starting Set the console keyboard layout...
         Starting Load Kernel Modules...
[  OK  ] Listening on initctl Compatibility Named Pipe.
[  OK  ] Reached target Swap.
[  OK  ] Listening on Journal Audit Socket.
[  OK  ] Listening on udev Control Socket.
[  OK  ] Listening on Syslog Socket.
[  OK  ] Started Dispatch Password …ts to Console Directory Watch.
[  OK  ] Reached target Local Encrypted Volumes.
         Starting Create list of re…odes for the current kernel...
[  OK  ] Created slice system-openvpn.slice.
         Starting Restore / save the current clock...
         Mounting Kernel Debug File System...
         Mounting POSIX Message Queue File System...
[  OK  ] Set up automount Arbitrary…s File System Automount Point.
[  OK  ] Listening on Journal Socket (/dev/log).
         Starting Journal Service...
[  OK  ] Listening on fsck to fsckd communication Socket.
         Starting Remount Root and Kernel File Systems...
         Starting Uncomplicated firewall...
[  OK  ] Reached target Paths.
[  OK  ] Listening on udev Kernel Socket.
         Starting udev Coldplug all Devices...
[  OK  ] Created slice system-serial\x2dgetty.slice.
[  OK  ] Mounted Huge Pages File System.
[  OK  ] Started Set the console keyboard layout.
[  OK  ] Started Create list of req… nodes for the current kernel.
[  OK  ] Started Restore / save the current clock.
[  OK  ] Mounted Kernel Debug File System.
[  OK  ] Mounted POSIX Message Queue File System.
[  OK  ] Started Load Kernel Modules.
[  OK  ] Started Remount Root and Kernel File Systems.
[  OK  ] Started Nameserver information manager.
         Starting Load/Save Random Seed...
         Starting Create System Users...
         Starting Apply Kernel Variables...
         Mounting Kernel Configuration File System...
[  OK  ] Started Journal Service.
[  OK  ] Mounted Kernel Configuration File System.
[  OK  ] Started Load/Save Random Seed.
[  OK  ] Started Apply Kernel Variables.
         Starting Flush Journal to Persistent Storage...
[  OK  ] Started udev Coldplug all Devices.
[  OK  ] Started Create System Users.
         Starting Create Static Device Nodes in /dev...
         Starting Helper to synchronize boot up for ifupdown...
[  OK  ] Started Helper to synchronize boot up for ifupdown.
[  OK  ] Started Flush Journal to Persistent Storage.
[  OK  ] Started Create Static Device Nodes in /dev.
         Starting udev Kernel Device Manager...
[  OK  ] Reached target Local File Systems (Pre).
         Mounting /tmp...
[  OK  ] Mounted /tmp.
[  OK  ] Reached target Local File Systems.
         Starting Armbian ZRAM config...
         Starting Raise network interfaces...
         Starting Create Volatile Files and Directories...
         Starting Set console font and keymap...
[  OK  ] Started Set console font and keymap.
[  OK  ] Started Create Volatile Files and Directories.
         Starting Update UTMP about System Boot/Shutdown...
[  OK  ] Started Entropy daemon using the HAVEGE algorithm.
[  OK  ] Started udev Kernel Device Manager.
[  OK  ] Found device /dev/ttyGS0.
[  OK  ] Started Update UTMP about System Boot/Shutdown.
[    9.593791] Unable to handle kernel paging request at virtual address 0000801                                                                                                                                                             e0f258010

Thanks both for giving it a got would like those 20% extra speed.

[guidol]

maybe you got a freeze because the system does try to use mire than 1.2GHz

On my NanoPi Neo2 I had onl 816Mhz after a update. Before it was 1.01GHz with a H5 CPU.

 

Do I edited the decompiled .dtb.

But a better solution was a own overlay only for up to 1.01GHz.

 

Maybe for testing purpose I can edit you a .dtb for your OPi Zero plus tomorrow.

[guidol]

Hi @Darkyere I edited a 4.19.59 dtb for using up to 1.2GHz on the OPi Zero Plus (found mine on the shelf)

BUT ATTENTION:

- This could make your system instable - because 1.056Ghz-1.20Ghz is used with to less voltage for the cpu

- You have to delete these 1 or 2 overlays in armbianEnv.txt

 

OK, what did I do (or use for 4.19.59-sunxi64 the attached .dtb/.dts):

 

backup old .dtb for security (going back if it fails some time):
 

cp /boot/dtb/allwinner/sun50i-h5-orangepi-zero-plus.dtb /boot/dtb/allwinner/sun50i-h5-orangepi-zero-plus.dtb_org

 

decompile OPi Zero Plus .dtb to .dts for editing (may give some warnings):

dtc -I dtb -O dts /boot/dtb/allwinner/sun50i-h5-orangepi-zero-plus.dtb -o /boot/dtb/allwinner/sun50i-h5-orangepi-zero-plus.dts

now editing the .dts via nano /boot/dtb/allwinner/sun50i-h5-orangepi-zero-plus.dts

 

change from:
 

                opp@1056000000 {
                        opp-hz = < 0x00 0x3ef14800 >;
                        opp-microvolt = < 0x142440 0x142440 0x142440 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

                opp@1104000000 {
                        opp-hz = < 0x00 0x41cdb400 >;
                        opp-microvolt = < 0x142440 0x142440 0x142440 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

                opp@1152000000 {
                        opp-hz = < 0x00 0x44aa2000 >;
                        opp-microvolt = < 0x142440 0x142440 0x142440 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

                opp@1200000000 {
                        opp-hz = < 0x00 0x47868c00 >;
                        opp-microvolt = < 0x142440 0x142440 0x142440 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

change to:

                opp@1056000000 {
                        opp-hz = < 0x00 0x3ef14800 >;
                        opp-microvolt = < 0x124f80 0x124f80 0x13d620 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

                opp@1104000000 {
                        opp-hz = < 0x00 0x41cdb400 >;
                        opp-microvolt = < 0x124f80 0x124f80 0x13d620 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

                opp@1152000000 {
                        opp-hz = < 0x00 0x44aa2000 >;
                        opp-microvolt = < 0x124f80 0x124f80 0x13d620 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

                opp@1200000000 {
                        opp-hz = < 0x00 0x47868c00 >;
                        opp-microvolt = < 0x124f80 0x124f80 0x13d620 >;
                        clock-latency-ns = < 0x3b9b0 >;
                };

now compile the .dts back to .dtb (may give some warnings):

dtc -I dts -O dtb /boot/dtb/allwinner/sun50i-h5-orangepi-zero-plus.dts -o /boot/dtb/allwinner/sun50i-h5-orangepi-zero-plus.dtb

Now reboot.

 

After reboot the system will scale up to 1.2Ghz again ( ON YOUR OWN RISK )  if you set it in armbian-config => system => cpu

 

cpufreq-info:

  driver: cpufreq-dt
  CPUs which run at the same hardware frequency: 0 1 2 3
  CPUs which need to have their frequency coordinated by software: 0 1 2 3
  maximum transition latency: 5.44 ms.
  hardware limits: 120 MHz - 1.20 GHz
  available frequency steps: 120 MHz, 240 MHz, 480 MHz, 648 MHz, 816 MHz, 960 MHz, 1.01 GHz, 1.06 GHz, 1.10 GHz, 1.15 GHz, 1.20 GHz
  available cpufreq governors: conservative, userspace, powersave, ondemand, performance, schedutil
  current policy: frequency should be within 480 MHz and 1.20 GHz.
                  The governor "schedutil" may decide which speed to use
                  within this range.

 

sun50i-h5-orangepi-zero-plus.dtb sun50i-h5-orangepi-zero-plus.dts

[Darkyere]

Since i have never tried this before just to be sure.

 

The overlays i have to delete is

 

cpu-clock-1.3Ghz-1.3v

gpio-regulator-1.3v

 

and then proceed ?

[guidol]

1 hour ago, Darkyere said:

Since i have never tried this before just to be sure.

 

The overlays i have to delete is

 

cpu-clock-1.3Ghz-1.3v

gpio-regulator-1.3v

 

and then proceed ?

only from the  armbianEnv.txt - then they wouldnt be loaded.

 

I did a test with the 1.2Ghz setting and the system makes errors & freezes  as I expected

I couldnt even do a apt update && apt upgrade while 1.2GHz was active!

 

When I set cpu in armbian-config from 480-1056Mhz the apt update && apt upgrade did work.

 

On the NanoPi Neo2 (also with H5 cpu) I do use only up to 1.01 (1008000) GHz.

 

You could try 1104 or 1152 Mhz, but I expect that they arent stable

 

BTW: If you do a update to armbian and the armbia-dtb is updated this change is lost again!

[5kft]

I'm just catching up on this topic...  I don't have access to my Zero Plus at the moment but from the picture on Xunlong's site (and my previous experience) it looks like this board has the same HW limitation as the Plus2 - the missing Q5 MOSFET (see red oval highlight in this picture):

This problem/limitation is described in this thread:

 

@Darkyere, if it in fact is the case that this part is not included on this board, then unfortunately your board will be limited to a maximum of 1008MHz (for reliable operation).  According to the schematic (https://linux-sunxi.org/images/6/67/ORANGE_PI-ZERO-PLUS_V1_0_Schematic.pdf, page 7), the power circuit does include the switching regulator, so it should be capable of providing 1.3v if this part were installed.  (Again, refer to the thread I mentioned previously for all details about this.)

 

Igor's guidance of specifying the 1.3v regulator overlay alone is a workaround that will enable the higher clockrate to 1.0GHz.  However, without the Q5 MOSFET installed, do not specify the 1.3GHz overclock overlay, as then your board will certainly crash (as you noticed) 

 

 

[Darkyere]

I appreciate a lot the attempt from you Guidol.

And its good to know it wont work that way.

 

The info from 5kft is also a interesting.

Seems like there is missing a MOSFET power regualor which is why Armbian cant clock it to 1.2Ghz.

 

I read the post 5kft mentioned and it seems like that the official Ubuntu image for Orange Pi Zero Plus can make it run at 1.2 Ghz.

So just an attempt i will try to burn the Official Image to another SDCard and see if it runs at 1.2Ghz.

Then i will take it from there not sure what the result will be.

 

Unfortunately i wont be home until Saturday so i probably wont be able to test it until then.

[guidol]

1 hour ago, Darkyere said:

it seems like that the official Ubuntu image for Orange Pi Zero Plus can make it run at 1.2 Ghz.

I think they did it the same unstable way  it will run at 1.2GHz but not stable for a long time...

[Darkyere]

BTW, i appreciate all the help just decided it wasn't worth it for me to take the chance and up the CPU freq because of the chance of damaging the device.

 

But i really appreciate the help and effort all.

 

TY for your time.

 

Best regards,

Darkyere

[nairn62]

On 11/16/2019 at 7:33 PM, Darkyere said:

I've bought a few of these boards and I've always soldered the Q5 MOSFET to each of them. I get 1296 MHz with the overlay added. You need a fan with a heavy heatsink to keep it cool, although I bought two smaller fans, and I'm using the clear plastic case with the sides removed. I haven't damaged any of them operating them like this. BTW, these boards make great TOR servers.