Armbian 20.02 (Chiru) Release Thread

stut · February 5, 2020

On 2/4/2020 at 6:33 PM, karabek said:
Correct.

Compare ...
/etc/NetworkManager/NetworkManager.conf
... in debian and ubutu.

I was being rhetorical Hope they follow Ubuntu at Debian. Even though I know about this every time I get that wrong password prompt I'm like huh? :lol:

Heisath · February 6, 2020

Hey,

just realized if users currently go to dl.armbian.com, example: https://dl.armbian.com/clearfogpro/ and select the buster_current download directly, they get the RC releases. This is probably not wanted behaviour.

Cheers,

count-doku

Igor · February 6, 2020

41 minutes ago, count-doku said:

This is probably not wanted behaviour.

Release process bug ... which has to be fixed by 20.05.

https://github.com/armbian/documentation/blob/master/docs/Process_Release-Model.md#2-release-candidate-branch-management

frauhottelmann · February 7, 2020

I would test the roc-rk3399-pc for you as I have it here and it works now with power via headers. It appears in your testing list, but it's not being build right now. I can build it myself, but that might defeat the purpose 😀

TonyMac32 · February 9, 2020

On 2/7/2020 at 10:27 AM, frauhottelmann said:

It appears in your testing list, but it's not being build right now.

The fact that it won't boot without special power considerations is part of the reason it isn't building, until the mainline guys get their fusb302 driver working properly I'm afraid this one will be a csc/at your own risk target. I have done some work with it, but the power issues are pretty fundamental.

On another note, @Igor my stack of Odroid MC1 Solos are refusing to boot the Buster 5.4 RC1, it gets to kernel (heartbeat), then faults out. I'm trying to find a 1.8V UART in my pile of stuff to do more debugging.

Igor · February 9, 2020

1 minute ago, TonyMac32 said:

Solos are refusing to boot the Buster 5.4 RC1

Have you tried trunk build? That should work.

TonyMac32 · February 9, 2020

51 minutes ago, Igor said:

Have you tried trunk build? That should work.

building one now for test. :-)

[edit]

Good!

lanefu · February 9, 2020

4 hours ago, TonyMac32 said:

building one now for test. :-)

[edit]

Good!

Hmmm i tried cherry-picking https://github.com/armbian/build/commit/020ddfcfa1b5f0d0973dc0cbabb79caaca515a5b into RC1 branch and didnt seem to fix.. going to test some more..

are there any other commits I should be looking at?

lanefu · February 10, 2020

15 hours ago, lanefu said:

Hmmm i tried cherry-picking https://github.com/armbian/build/commit/020ddfcfa1b5f0d0973dc0cbabb79caaca515a5b into RC1 branch and didnt seem to fix.. going to test some more..

are there any other commits I should be looking at?

Alright I cherry picked 2 fixes and merged into RC1.. seems to be working..

https://github.com/armbian/build/pull/1795

@Igor do you wanna kick off another build of RC1 images.... any other fixes we should squeeze in?

Igor · February 10, 2020

1 hour ago, lanefu said:

any other fixes we should squeeze in?

I will try to resolve Allwinner A64 issues, the rest will need to wait for next release.

lanefu · February 10, 2020

So good news.... I got a 1G Rock64 V2. build RC1 image

totally works

Igor · February 10, 2020

I also did some changes on A64 by replacing DVFS handling which bring some stability ... but my test subjects still simply shuts down on a moderate load - installing a desktop on top of CLI image. Some are better (Lime A64) then the other Bananapi M64 (most sensitive).

A64 laptops and modern kernel 5.4 / 5.5 = no screen. Driver for panel has been changed and I haven't resolve hot to put things together. @Icenowy @jernej ?

TonyMac32 · February 11, 2020

So good news.... I got a 1G Rock64 V2. build RC1 image

totally works

O RLY? Very nice.

Sent from my Pixel using Tapatalk

jernej · February 11, 2020

17 hours ago, Igor said:

A64 laptops and modern kernel 5.4 / 5.5 = no screen. Driver for panel has been changed and I haven't resolve hot to put things together. @Icenowy @jernej ?

If you have Pinebook in mind and the one from Olimex, they both use anx6345 IIRC. Driver for that chip was merged in kernel some time ago, but it doesn't consider "panel-supply" property. I guess that's what's wrong. @Icenowy?

Icenowy · February 11, 2020

@Igor @jernej I had a headache night to debug on ANX6345 on 5.6-rc1. The polarity of the reset pin in the DT should be reversed with the mainlined driver, compared to my first version.

5.4 should not be affected by this because the DT binding enters at 5.5 and the real driver at 5.6 .

Igor · February 11, 2020

17 minutes ago, Icenowy said:

5.4 should not be affected by this because the DT binding enters at 5.5 and the real driver at 5.6 .

Our dirty patches doesn't apply and work anymore ... I remove them and replace with a driver from 5.6. No one shows anything on the screen.

sun50i-a64.dtsi

Spoiler


/*
 * Copyright (C) 2016 ARM Ltd.
 * based on the Allwinner H3 dtsi:
 *    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/clock/sun50i-a64-ccu.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>
#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	chosen {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		simplefb_lcd: framebuffer-lcd {
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "mixer0-lcd0";
			clocks = <&ccu CLK_TCON0>,
				 <&display_clocks CLK_MIXER0>;
			status = "disabled";
		};

		simplefb_hdmi: framebuffer-hdmi {
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "mixer1-lcd1-hdmi";
			clocks = <&display_clocks CLK_MIXER1>,
				 <&ccu CLK_TCON1>, <&ccu CLK_HDMI>;
			status = "disabled";
		};
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0>;
			enable-method = "psci";
			next-level-cache = <&L2>;
			clocks = <&ccu 21>;
			clock-names = "cpu";
			#cooling-cells = <2>;
		};

		cpu1: cpu@1 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <1>;
			enable-method = "psci";
			next-level-cache = <&L2>;
			clocks = <&ccu 21>;
			clock-names = "cpu";
			#cooling-cells = <2>;
		};

		cpu2: cpu@2 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <2>;
			enable-method = "psci";
			next-level-cache = <&L2>;
			clocks = <&ccu 21>;
			clock-names = "cpu";
			#cooling-cells = <2>;
		};

		cpu3: cpu@3 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <3>;
			enable-method = "psci";
			next-level-cache = <&L2>;
			clocks = <&ccu 21>;
			clock-names = "cpu";
			#cooling-cells = <2>;
		};

		L2: l2-cache {
			compatible = "cache";
			cache-level = <2>;
		};
	};

	de: display-engine {
		compatible = "allwinner,sun50i-a64-display-engine";
		allwinner,pipelines = <&mixer0>,
				      <&mixer1>;
		status = "disabled";
	};

	osc24M: osc24M_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "osc24M";
	};

	osc32k: osc32k_clk {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
		clock-output-names = "ext-osc32k";
	};

	pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	sound: sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "sun50i-a64-audio";
		simple-audio-card,format = "i2s";
		simple-audio-card,frame-master = <&cpudai>;
		simple-audio-card,bitclock-master = <&cpudai>;
		simple-audio-card,mclk-fs = <128>;
		simple-audio-card,aux-devs = <&codec_analog>;
		simple-audio-card,routing =
				"Left DAC", "AIF1 Slot 0 Left",
				"Right DAC", "AIF1 Slot 0 Right",
				"AIF1 Slot 0 Left ADC", "Left ADC",
				"AIF1 Slot 0 Right ADC", "Right ADC";
		status = "disabled";

		cpudai: simple-audio-card,cpu {
			sound-dai = <&dai>;
		};

		link_codec: simple-audio-card,codec {
			sound-dai = <&codec>;
		};
	};

	sound_spdif {
		compatible = "simple-audio-card";
		simple-audio-card,name = "On-board SPDIF";

		simple-audio-card,cpu {
			sound-dai = <&spdif>;
		};

		simple-audio-card,codec {
			sound-dai = <&spdif_out>;
		};
	};

	spdif_out: spdif-out {
		#sound-dai-cells = <0>;
		compatible = "linux,spdif-dit";
	};

	timer {
		compatible = "arm,armv8-timer";
		allwinner,erratum-unknown1;
		interrupts = <GIC_PPI 13
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 14
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 11
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 10
			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
	};

	thermal-zones {
		cpu_thermal: cpu0-thermal {
			/* milliseconds */
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&ths 0>;

			cooling-maps {
				map0 {
					trip = <&cpu_alert0>;
					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
				map1 {
					trip = <&cpu_alert1>;
					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
				};
			};

			trips {
				cpu_alert0: cpu_alert0 {
					/* milliCelsius */
					temperature = <75000>;
					hysteresis = <2000>;
					type = "passive";
				};

				cpu_alert1: cpu_alert1 {
					/* milliCelsius */
					temperature = <90000>;
					hysteresis = <2000>;
					type = "hot";
				};

				cpu_crit: cpu_crit {
					/* milliCelsius */
					temperature = <110000>;
					hysteresis = <2000>;
					type = "critical";
				};
			};
		};

		gpu0_thermal: gpu0-thermal {
			/* milliseconds */
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&ths 1>;
		};

		gpu1_thermal: gpu1-thermal {
			/* milliseconds */
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&ths 2>;
		};
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		bus@1000000 {
			compatible = "allwinner,sun50i-a64-de2";
			reg = <0x1000000 0x400000>;
			allwinner,sram = <&de2_sram 1>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x1000000 0x400000>;

			display_clocks: clock@0 {
				compatible = "allwinner,sun50i-a64-de2-clk";
				reg = <0x0 0x100000>;
				clocks = <&ccu CLK_BUS_DE>,
					 <&ccu CLK_DE>;
				clock-names = "bus",
					      "mod";
				resets = <&ccu RST_BUS_DE>;
				#clock-cells = <1>;
				#reset-cells = <1>;
			};

			mixer0: mixer@100000 {
				compatible = "allwinner,sun50i-a64-de2-mixer-0";
				reg = <0x100000 0x100000>;
				clocks = <&display_clocks CLK_BUS_MIXER0>,
					 <&display_clocks CLK_MIXER0>;
				clock-names = "bus",
					      "mod";
				resets = <&display_clocks RST_MIXER0>;

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					mixer0_out: port@1 {
						#address-cells = <1>;
						#size-cells = <0>;
						reg = <1>;

						mixer0_out_tcon0: endpoint@0 {
							reg = <0>;
							remote-endpoint = <&tcon0_in_mixer0>;
						};

						mixer0_out_tcon1: endpoint@1 {
							reg = <1>;
							remote-endpoint = <&tcon1_in_mixer0>;
						};
					};
				};
			};

			mixer1: mixer@200000 {
				compatible = "allwinner,sun50i-a64-de2-mixer-1";
				reg = <0x200000 0x100000>;
				clocks = <&display_clocks CLK_BUS_MIXER1>,
					 <&display_clocks CLK_MIXER1>;
				clock-names = "bus",
					      "mod";
				resets = <&display_clocks RST_MIXER1>;

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					mixer1_out: port@1 {
						#address-cells = <1>;
						#size-cells = <0>;
						reg = <1>;

						mixer1_out_tcon0: endpoint@0 {
							reg = <0>;
							remote-endpoint = <&tcon0_in_mixer1>;
						};

						mixer1_out_tcon1: endpoint@1 {
							reg = <1>;
							remote-endpoint = <&tcon1_in_mixer1>;
						};
					};
				};
			};
		};

		syscon: syscon@1c00000 {
			compatible = "allwinner,sun50i-a64-system-control";
			reg = <0x01c00000 0x1000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			sram_c: sram@18000 {
				compatible = "mmio-sram";
				reg = <0x00018000 0x28000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x00018000 0x28000>;

				de2_sram: sram-section@0 {
					compatible = "allwinner,sun50i-a64-sram-c";
					reg = <0x0000 0x28000>;
				};
			};

			sram_c1: sram@1d00000 {
				compatible = "mmio-sram";
				reg = <0x01d00000 0x40000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x01d00000 0x40000>;

				ve_sram: sram-section@0 {
					compatible = "allwinner,sun50i-a64-sram-c1",
						     "allwinner,sun4i-a10-sram-c1";
					reg = <0x000000 0x40000>;
				};
			};
		};

		dma: dma-controller@1c02000 {
			compatible = "allwinner,sun50i-a64-dma";
			reg = <0x01c02000 0x1000>;
			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_DMA>;
			dma-channels = <8>;
			dma-requests = <27>;
			resets = <&ccu RST_BUS_DMA>;
			#dma-cells = <1>;
		};

		tcon0: lcd-controller@1c0c000 {
			compatible = "allwinner,sun50i-a64-tcon-lcd",
				     "allwinner,sun8i-a83t-tcon-lcd";
			reg = <0x01c0c000 0x1000>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
			clock-names = "ahb", "tcon-ch0";
			clock-output-names = "tcon-pixel-clock";
			#clock-cells = <0>;
			resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
			reset-names = "lcd", "lvds";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				tcon0_in: port@0 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					tcon0_in_mixer0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&mixer0_out_tcon0>;
					};

					tcon0_in_mixer1: endpoint@1 {
						reg = <1>;
						remote-endpoint = <&mixer1_out_tcon0>;
					};
				};

				tcon0_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					tcon0_out_dsi: endpoint@1 {
						reg = <1>;
						remote-endpoint = <&dsi_in_tcon0>;
						allwinner,tcon-channel = <1>;
					};
				};
			};
		};

		tcon1: lcd-controller@1c0d000 {
			compatible = "allwinner,sun50i-a64-tcon-tv",
				     "allwinner,sun8i-a83t-tcon-tv";
			reg = <0x01c0d000 0x1000>;
			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_TCON1>, <&ccu CLK_TCON1>;
			clock-names = "ahb", "tcon-ch1";
			resets = <&ccu RST_BUS_TCON1>;
			reset-names = "lcd";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				tcon1_in: port@0 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <0>;

					tcon1_in_mixer0: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&mixer0_out_tcon1>;
					};

					tcon1_in_mixer1: endpoint@1 {
						reg = <1>;
						remote-endpoint = <&mixer1_out_tcon1>;
					};
				};

				tcon1_out: port@1 {
					#address-cells = <1>;
					#size-cells = <0>;
					reg = <1>;

					tcon1_out_hdmi: endpoint@1 {
						reg = <1>;
						remote-endpoint = <&hdmi_in_tcon1>;
					};
				};
			};
		};

		video-codec@1c0e000 {
			compatible = "allwinner,sun50i-a64-video-engine";
			reg = <0x01c0e000 0x1000>;
			clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
				 <&ccu CLK_DRAM_VE>;
			clock-names = "ahb", "mod", "ram";
			resets = <&ccu RST_BUS_VE>;
			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
			allwinner,sram = <&ve_sram 1>;
		};

		mmc0: mmc@1c0f000 {
			compatible = "allwinner,sun50i-a64-mmc";
			reg = <0x01c0f000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC0>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
			max-frequency = <150000000>;
			status = "disabled";
			bus-width = <0x4>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		mmc1: mmc@1c10000 {
			compatible = "allwinner,sun50i-a64-mmc";
			reg = <0x01c10000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC1>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
			max-frequency = <150000000>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		mmc2: mmc@1c11000 {
			compatible = "allwinner,sun50i-a64-emmc";
			reg = <0x01c11000 0x1000>;
			clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
			clock-names = "ahb", "mmc";
			resets = <&ccu RST_BUS_MMC2>;
			reset-names = "ahb";
			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
			max-frequency = <200000000>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		sid: eeprom@1c14000 {
			compatible = "allwinner,sun50i-a64-sid";
			reg = <0x1c14000 0x400>;
			#address-cells = <1>;
			#size-cells = <1>;

			ths_calibration: thermal-sensor-calibration@34 {
				reg = <0x34 0x8>;
			};
		};

		crypto: crypto@1c15000 {
			compatible = "allwinner,sun50i-a64-crypto";
			reg = <0x01c15000 0x1000>;
			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
			clock-names = "bus", "mod";
			resets = <&ccu RST_BUS_CE>;
		};

		usb_otg: usb@1c19000 {
			compatible = "allwinner,sun8i-a33-musb";
			reg = <0x01c19000 0x0400>;
			clocks = <&ccu CLK_BUS_OTG>;
			resets = <&ccu RST_BUS_OTG>;
			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "mc";
			phys = <&usbphy 0>;
			phy-names = "usb";
			extcon = <&usbphy 0>;
			dr_mode = "otg";
			status = "disabled";
		};

		usbphy: phy@1c19400 {
			compatible = "allwinner,sun50i-a64-usb-phy";
			reg = <0x01c19400 0x14>,
			      <0x01c1a800 0x4>,
			      <0x01c1b800 0x4>;
			reg-names = "phy_ctrl",
				    "pmu0",
				    "pmu1";
			clocks = <&ccu CLK_USB_PHY0>,
				 <&ccu CLK_USB_PHY1>;
			clock-names = "usb0_phy",
				      "usb1_phy";
			resets = <&ccu RST_USB_PHY0>,
				 <&ccu RST_USB_PHY1>;
			reset-names = "usb0_reset",
				      "usb1_reset";
			status = "disabled";
			#phy-cells = <1>;
		};

		ehci0: usb@1c1a000 {
			compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
			reg = <0x01c1a000 0x100>;
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI0>,
				 <&ccu CLK_BUS_EHCI0>,
				 <&ccu CLK_USB_OHCI0>;
			resets = <&ccu RST_BUS_OHCI0>,
				 <&ccu RST_BUS_EHCI0>;
			status = "disabled";
		};

		ohci0: usb@1c1a400 {
			compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
			reg = <0x01c1a400 0x100>;
			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI0>,
				 <&ccu CLK_USB_OHCI0>;
			resets = <&ccu RST_BUS_OHCI0>;
			status = "disabled";
		};

		ehci1: usb@1c1b000 {
			compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
			reg = <0x01c1b000 0x100>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI1>,
				 <&ccu CLK_BUS_EHCI1>,
				 <&ccu CLK_USB_OHCI1>;
			resets = <&ccu RST_BUS_OHCI1>,
				 <&ccu RST_BUS_EHCI1>;
			phys = <&usbphy 1>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci1: usb@1c1b400 {
			compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
			reg = <0x01c1b400 0x100>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_OHCI1>,
				 <&ccu CLK_USB_OHCI1>;
			resets = <&ccu RST_BUS_OHCI1>;
			phys = <&usbphy 1>;
			phy-names = "usb";
			status = "disabled";
		};

		ccu: clock@1c20000 {
			compatible = "allwinner,sun50i-a64-ccu";
			reg = <0x01c20000 0x400>;
			clocks = <&osc24M>, <&rtc 0>;
			clock-names = "hosc", "losc";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		pio: pinctrl@1c20800 {
			compatible = "allwinner,sun50i-a64-pinctrl";
			reg = <0x01c20800 0x400>;
			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <3>;
			interrupt-controller;
			#interrupt-cells = <3>;

			csi_pins: csi-pins {
				pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
				       "PE7", "PE8", "PE9", "PE10", "PE11";
				function = "csi";
			};

			/omit-if-no-ref/
			csi_mclk_pin: csi-mclk-pin {
				pins = "PE1";
				function = "csi";
			};

			i2c0_pins: i2c0-pins {
				pins = "PH0", "PH1";
				function = "i2c0";
			};

			i2c1_pins: i2c1-pins {
				pins = "PH2", "PH3";
				function = "i2c1";
			};

			/omit-if-no-ref/
			lcd_rgb666_pins: lcd-rgb666-pins {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4",
				       "PD5", "PD6", "PD7", "PD8", "PD9",
				       "PD10", "PD11", "PD12", "PD13",
				       "PD14", "PD15", "PD16", "PD17",
				       "PD18", "PD19", "PD20", "PD21";
				function = "lcd0";
			};

			mmc0_pins: mmc0-pins {
				pins = "PF0", "PF1", "PF2", "PF3",
				       "PF4", "PF5";
				function = "mmc0";
				drive-strength = <30>;
				bias-pull-up;
			};

			mmc1_pins: mmc1-pins {
				pins = "PG0", "PG1", "PG2", "PG3",
				       "PG4", "PG5";
				function = "mmc1";
				drive-strength = <30>;
				bias-pull-up;
			};

			mmc2_pins: mmc2-pins {
				pins = "PC5", "PC6", "PC8", "PC9",
				       "PC10","PC11", "PC12", "PC13",
				       "PC14", "PC15", "PC16";
				function = "mmc2";
				drive-strength = <30>;
				bias-pull-up;
			};

			mmc2_ds_pin: mmc2-ds-pin {
				pins = "PC1";
				function = "mmc2";
				drive-strength = <30>;
				bias-pull-up;
			};

			pwm_pin: pwm-pin {
				pins = "PD22";
				function = "pwm";
			};

			rmii_pins: rmii-pins {
				pins = "PD10", "PD11", "PD13", "PD14", "PD17",
				       "PD18", "PD19", "PD20", "PD22", "PD23";
				function = "emac";
				drive-strength = <40>;
			};

			rgmii_pins: rgmii-pins {
				pins = "PD8", "PD9", "PD10", "PD11", "PD12",
				       "PD13", "PD15", "PD16", "PD17", "PD18",
				       "PD19", "PD20", "PD21", "PD22", "PD23";
				function = "emac";
				drive-strength = <40>;
			};

			spdif_tx_pin: spdif-tx-pin {
				pins = "PH8";
				function = "spdif";
			};

			spi0_pins: spi0-pins {
				pins = "PC0", "PC1", "PC2", "PC3";
				function = "spi0";
			};

			spi1_pins: spi1-pins {
				pins = "PD0", "PD1", "PD2", "PD3";
				function = "spi1";
			};

			uart0_pb_pins: uart0-pb-pins {
				pins = "PB8", "PB9";
				function = "uart0";
			};

			uart1_pins: uart1-pins {
				pins = "PG6", "PG7";
				function = "uart1";
			};

			uart1_rts_cts_pins: uart1-rts-cts-pins {
				pins = "PG8", "PG9";
				function = "uart1";
			};

			uart2_pins: uart2-pins {
				pins = "PB0", "PB1";
				function = "uart2";
			};

			uart3_pins: uart3-pins {
				pins = "PD0", "PD1";
				function = "uart3";
			};

			uart4_pins: uart4-pins {
				pins = "PD2", "PD3";
				function = "uart4";
			};

			uart4_rts_cts_pins: uart4-rts-cts-pins {
				pins = "PD4", "PD5";
				function = "uart4";
			};
		};

		spdif: spdif@1c21000 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun50i-a64-spdif",
				     "allwinner,sun8i-h3-spdif";
			reg = <0x01c21000 0x400>;
			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
			resets = <&ccu RST_BUS_SPDIF>;
			clock-names = "apb", "spdif";
			dmas = <&dma 2>;
			dma-names = "tx";
			pinctrl-names = "default";
			pinctrl-0 = <&spdif_tx_pin>;
			status = "disabled";
		};

		lradc: lradc@1c21800 {
			compatible = "allwinner,sun50i-a64-lradc",
				     "allwinner,sun8i-a83t-r-lradc";
			reg = <0x01c21800 0x400>;
			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		i2s0: i2s@1c22000 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun50i-a64-i2s",
				     "allwinner,sun8i-h3-i2s";
			reg = <0x01c22000 0x400>;
			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
			clock-names = "apb", "mod";
			resets = <&ccu RST_BUS_I2S0>;
			dma-names = "rx", "tx";
			dmas = <&dma 3>, <&dma 3>;
			status = "disabled";
		};

		i2s1: i2s@1c22400 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun50i-a64-i2s",
				     "allwinner,sun8i-h3-i2s";
			reg = <0x01c22400 0x400>;
			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
			clock-names = "apb", "mod";
			resets = <&ccu RST_BUS_I2S1>;
			dma-names = "rx", "tx";
			dmas = <&dma 4>, <&dma 4>;
			status = "disabled";
		};

		dai: dai@1c22c00 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun50i-a64-codec-i2s";
			reg = <0x01c22c00 0x200>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
			clock-names = "apb", "mod";
			resets = <&ccu RST_BUS_CODEC>;
			dmas = <&dma 15>, <&dma 15>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

		codec: codec@1c22e00 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun8i-a33-codec";
			reg = <0x01c22e00 0x600>;
			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
			clock-names = "bus", "mod";
			status = "disabled";
		};

		ths: thermal-sensor@1c25000 {
			compatible = "allwinner,sun50i-a64-ths";
			reg = <0x01c25000 0x100>;
			clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
			clock-names = "bus", "mod";
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			resets = <&ccu RST_BUS_THS>;
			nvmem-cells = <&ths_calibration>;
			nvmem-cell-names = "calibration";
			#thermal-sensor-cells = <1>;
		};

		uart0: serial@1c28000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c28000 0x400>;
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART0>;
			resets = <&ccu RST_BUS_UART0>;
			status = "disabled";
		};

		uart1: serial@1c28400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c28400 0x400>;
			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART1>;
			resets = <&ccu RST_BUS_UART1>;
			status = "disabled";
		};

		uart2: serial@1c28800 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c28800 0x400>;
			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART2>;
			resets = <&ccu RST_BUS_UART2>;
			status = "disabled";
		};

		uart3: serial@1c28c00 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c28c00 0x400>;
			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART3>;
			resets = <&ccu RST_BUS_UART3>;
			status = "disabled";
		};

		uart4: serial@1c29000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x01c29000 0x400>;
			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
			reg-shift = <2>;
			reg-io-width = <4>;
			clocks = <&ccu CLK_BUS_UART4>;
			resets = <&ccu RST_BUS_UART4>;
			status = "disabled";
		};

		i2c0: i2c@1c2ac00 {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x01c2ac00 0x400>;
			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C0>;
			resets = <&ccu RST_BUS_I2C0>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c0_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c1: i2c@1c2b000 {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x01c2b000 0x400>;
			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C1>;
			resets = <&ccu RST_BUS_I2C1>;
			pinctrl-names = "default";
			pinctrl-0 = <&i2c1_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c2: i2c@1c2b400 {
			compatible = "allwinner,sun6i-a31-i2c";
			reg = <0x01c2b400 0x400>;
			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2C2>;
			resets = <&ccu RST_BUS_I2C2>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};


		spi0: spi@1c68000 {
			compatible = "allwinner,sun8i-h3-spi";
			reg = <0x01c68000 0x1000>;
			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
			clock-names = "ahb", "mod";
			dmas = <&dma 23>, <&dma 23>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <&spi0_pins>;
			resets = <&ccu RST_BUS_SPI0>;
			status = "disabled";
			num-cs = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		spi1: spi@1c69000 {
			compatible = "allwinner,sun8i-h3-spi";
			reg = <0x01c69000 0x1000>;
			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
			clock-names = "ahb", "mod";
			dmas = <&dma 24>, <&dma 24>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <&spi1_pins>;
			resets = <&ccu RST_BUS_SPI1>;
			status = "disabled";
			num-cs = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		emac: ethernet@1c30000 {
			compatible = "allwinner,sun50i-a64-emac";
			syscon = <&syscon>;
			reg = <0x01c30000 0x10000>;
			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			resets = <&ccu RST_BUS_EMAC>;
			reset-names = "stmmaceth";
			clocks = <&ccu CLK_BUS_EMAC>;
			clock-names = "stmmaceth";
			status = "disabled";

			mdio: mdio {
				compatible = "snps,dwmac-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		mali: gpu@1c40000 {
			compatible = "allwinner,sun50i-a64-mali", "arm,mali-400";
			reg = <0x01c40000 0x10000>;
			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "gp",
					  "gpmmu",
					  "pp0",
					  "ppmmu0",
					  "pp1",
					  "ppmmu1",
					  "pmu";
			clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
			clock-names = "bus", "core";
			resets = <&ccu RST_BUS_GPU>;
		};

		gic: interrupt-controller@1c81000 {
			compatible = "arm,gic-400";
			reg = <0x01c81000 0x1000>,
			      <0x01c82000 0x2000>,
			      <0x01c84000 0x2000>,
			      <0x01c86000 0x2000>;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
			interrupt-controller;
			#interrupt-cells = <3>;
		};

		pwm: pwm@1c21400 {
			compatible = "allwinner,sun50i-a64-pwm",
				     "allwinner,sun5i-a13-pwm";
			reg = <0x01c21400 0x400>;
			clocks = <&osc24M>;
			pinctrl-names = "default";
			pinctrl-0 = <&pwm_pin>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		csi: csi@1cb0000 {
			compatible = "allwinner,sun50i-a64-csi";
			reg = <0x01cb0000 0x1000>;
			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_CSI>,
				 <&ccu CLK_CSI_SCLK>,
				 <&ccu CLK_DRAM_CSI>;
			clock-names = "bus", "mod", "ram";
			resets = <&ccu RST_BUS_CSI>;
			pinctrl-names = "default";
			pinctrl-0 = <&csi_pins>;
			status = "disabled";
		};

		dsi: dsi@1ca0000 {
			compatible = "allwinner,sun50i-a64-mipi-dsi";
			reg = <0x01ca0000 0x1000>;
			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_MIPI_DSI>;
			resets = <&ccu RST_BUS_MIPI_DSI>;
			phys = <&dphy>;
			phy-names = "dphy";
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;

			port {
				dsi_in_tcon0: endpoint {
					remote-endpoint = <&tcon0_out_dsi>;
				};
			};
		};

		dphy: d-phy@1ca1000 {
			compatible = "allwinner,sun50i-a64-mipi-dphy",
				     "allwinner,sun6i-a31-mipi-dphy";
			reg = <0x01ca1000 0x1000>;
			clocks = <&ccu CLK_BUS_MIPI_DSI>,
				 <&ccu CLK_DSI_DPHY>;
			clock-names = "bus", "mod";
			resets = <&ccu RST_BUS_MIPI_DSI>;
			status = "disabled";
			#phy-cells = <0>;
		};

		hdmi: hdmi@1ee0000 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun50i-a64-dw-hdmi",
				     "allwinner,sun8i-a83t-dw-hdmi";
			reg = <0x01ee0000 0x10000>;
			reg-io-width = <1>;
			interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
				 <&ccu CLK_HDMI>;
			clock-names = "iahb", "isfr", "tmds";
			resets = <&ccu RST_BUS_HDMI1>;
			reset-names = "ctrl";
			phys = <&hdmi_phy>;
			phy-names = "phy";
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				hdmi_in: port@0 {
					reg = <0>;

					hdmi_in_tcon1: endpoint {
						remote-endpoint = <&tcon1_out_hdmi>;
					};
				};

				hdmi_out: port@1 {
					reg = <1>;
				};
			};
		};

		hdmi_phy: hdmi-phy@1ef0000 {
			compatible = "allwinner,sun50i-a64-hdmi-phy";
			reg = <0x01ef0000 0x10000>;
			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
				 <&ccu CLK_PLL_VIDEO0>;
			clock-names = "bus", "mod", "pll-0";
			resets = <&ccu RST_BUS_HDMI0>;
			reset-names = "phy";
			#phy-cells = <0>;
		};

		i2s2: i2s@1c22800 {
			#sound-dai-cells = <0>;
			compatible = "allwinner,sun8i-h3-i2s";
			reg = <0x01c22800 0x400>;
			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
			clock-names = "apb", "mod";
			dmas = <&dma 27>;
			resets = <&ccu RST_BUS_I2S2>;
			dma-names = "tx";
			status = "disabled";
		};

		sound_hdmi: sound_hdmi {
			compatible = "simple-audio-card";
			simple-audio-card,format = "i2s";
			simple-audio-card,name = "allwinner,hdmi";
			simple-audio-card,mclk-fs = <256>;
			status = "disabled";

			simple-audio-card,codec {
				sound-dai = <&hdmi>;
			};

			simple-audio-card,cpu {
				sound-dai = <&i2s2>;
			};
		};

		rtc: rtc@1f00000 {
			compatible = "allwinner,sun50i-a64-rtc",
				     "allwinner,sun8i-h3-rtc";
			reg = <0x01f00000 0x400>;
			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
			clock-output-names = "osc32k", "osc32k-out", "iosc";
			clocks = <&osc32k>;
			#clock-cells = <1>;
		};

		r_intc: interrupt-controller@1f00c00 {
			compatible = "allwinner,sun50i-a64-r-intc",
				     "allwinner,sun6i-a31-r-intc";
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x01f00c00 0x400>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		};

		r_ccu: clock@1f01400 {
			compatible = "allwinner,sun50i-a64-r-ccu";
			reg = <0x01f01400 0x100>;
			clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
				 <&ccu CLK_PLL_PERIPH0>;
			clock-names = "hosc", "losc", "iosc", "pll-periph";
			#clock-cells = <1>;
			#reset-cells = <1>;
		};

		codec_analog: codec-analog@1f015c0 {
			compatible = "allwinner,sun50i-a64-codec-analog";
			reg = <0x01f015c0 0x4>;
			status = "disabled";
		};

		r_i2c: i2c@1f02400 {
			compatible = "allwinner,sun50i-a64-i2c",
				     "allwinner,sun6i-a31-i2c";
			reg = <0x01f02400 0x400>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_APB0_I2C>;
			resets = <&r_ccu RST_APB0_I2C>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		r_ir: ir@1f02000 {
			compatible = "allwinner,sun50i-a64-ir",
				     "allwinner,sun6i-a31-ir";
			reg = <0x01f02000 0x400>;
			clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
			clock-names = "apb", "ir";
			resets = <&r_ccu RST_APB0_IR>;
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&r_ir_rx_pin>;
			status = "disabled";
		};

		r_pwm: pwm@1f03800 {
			compatible = "allwinner,sun50i-a64-pwm",
				     "allwinner,sun5i-a13-pwm";
			reg = <0x01f03800 0x400>;
			clocks = <&osc24M>;
			pinctrl-names = "default";
			pinctrl-0 = <&r_pwm_pin>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		r_pio: pinctrl@1f02c00 {
			compatible = "allwinner,sun50i-a64-r-pinctrl";
			reg = <0x01f02c00 0x400>;
			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <3>;
			interrupt-controller;
			#interrupt-cells = <3>;

			r_i2c_pl89_pins: r-i2c-pl89-pins {
				pins = "PL8", "PL9";
				function = "s_i2c";
			};

			r_ir_rx_pin: r-ir-rx-pin {
				pins = "PL11";
				function = "s_cir_rx";
			};

			r_pwm_pin: r-pwm-pin {
				pins = "PL10";
				function = "s_pwm";
			};

			r_rsb_pins: r-rsb-pins {
				pins = "PL0", "PL1";
				function = "s_rsb";
			};
		};

		r_rsb: rsb@1f03400 {
			compatible = "allwinner,sun8i-a23-rsb";
			reg = <0x01f03400 0x400>;
			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&r_ccu 6>;
			clock-frequency = <3000000>;
			resets = <&r_ccu 2>;
			pinctrl-names = "default";
			pinctrl-0 = <&r_rsb_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		wdt0: watchdog@1c20ca0 {
			compatible = "allwinner,sun50i-a64-wdt",
				     "allwinner,sun6i-a31-wdt";
			reg = <0x01c20ca0 0x20>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc24M>;
		};
	};
};

pinebook

Spoiler


// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
 * Copyright (C) 2018 Vasily Khoruzhick <anarsoul@gmail.com>
 *
 */

/dts-v1/;

#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>

/ {
	model = "Pinebook";
	compatible = "pine64,pinebook", "allwinner,sun50i-a64";

	aliases {
		serial0 = &uart0;
		ethernet0 = &rtl8723cs;
	};

	vdd_bl: regulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "bl-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
		enable-active-high;
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm 0 50000 0>;
		brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
		default-brightness-level = <2>;
		enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
		power-supply = <&vdd_bl>;
	};

	chosen {
		stdout-path = "serial0:115200n8";

		framebuffer-lcd {
			panel-supply = <&reg_dc1sw>;
			dvdd25-supply = <&reg_dldo2>;
			dvdd12-supply = <&reg_fldo1>;
		};
	};

	gpio_keys {
		compatible = "gpio-keys";

		lid_switch {
			label = "Lid Switch";
			gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */
			linux,input-type = <EV_SW>;
			linux,code = <SW_LID>;
			linux,can-disable;
			wakeup-source;
		};
	};

	hdmi-connector {
		compatible = "hdmi-connector";
		type = "a";

		port {
			hdmi_con_in: endpoint {
				remote-endpoint = <&hdmi_out_con>;
			};
		};
	};

	reg_vcc3v3: vcc3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	wifi_pwrseq: wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
	};

	speaker_amp: audio-amplifier {
		compatible = "simple-audio-amplifier";
		/*
		 * TODO This is actually a fixed regulator controlled by
		 * the GPIO line on the PMIC. This should be corrected
		 * once GPIO support is added for this PMIC.
		 */
		VCC-supply = <&reg_ldo_io0>;
		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
		sound-name-prefix = "Speaker Amp";
	};

};

&codec {
	status = "okay";
};

&codec_analog {
	cpvdd-supply = <&reg_eldo1>;
	status = "okay";
};

&cpu0 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu1 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu2 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu3 {
	cpu-supply = <&reg_dcdc2>;
};

&dai {
	status = "okay";
};

&de {
	status = "okay";
};

&ehci0 {
	phys = <&usbphy 0>;
	phy-names = "usb";
	status = "okay";
};

&ehci1 {
	status = "okay";
};

&hdmi {
	hvcc-supply = <&reg_dldo1>;
	status = "okay";
};

&hdmi_out {
	hdmi_out_con: endpoint {
		remote-endpoint = <&hdmi_con_in>;
	};
};

&mmc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	vmmc-supply = <&reg_dcdc1>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
	disable-wp;
	bus-width = <4>;
	status = "okay";
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&reg_dldo4>;
	vqmmc-supply = <&reg_eldo1>;
	mmc-pwrseq = <&wifi_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";

	rtl8723cs: wifi@1 {
		reg = <1>;
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
	vmmc-supply = <&reg_dcdc1>;
	vqmmc-supply = <&reg_eldo1>;
	bus-width = <8>;
	non-removable;
	cap-mmc-hw-reset;
	mmc-hs200-1_8v;
	status = "okay";
};

&ohci0 {
	phys = <&usbphy 0>;
	phy-names = "usb";
	status = "okay";
};

&ohci1 {
	status = "okay";
};

&pwm {
	status = "okay";
};

&r_rsb {
	status = "okay";

	axp803: pmic@3a3 {
		compatible = "x-powers,axp803";
		reg = <0x3a3>;
		interrupt-parent = <&r_intc>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	};
};

/* The ANX6345 eDP-bridge is on r_i2c */
&r_i2c {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&r_i2c_pl89_pins>;
	status = "okay";
};

#include "axp803.dtsi"

&ac_power_supply {
	status = "okay";
};

&battery_power_supply {
	status = "okay";
};

&reg_aldo1 {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
	regulator-name = "vcc-csi";
};

&reg_aldo2 {
	regulator-always-on;
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-pl";
};

&reg_aldo3 {
	regulator-always-on;
	regulator-min-microvolt = <2700000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-pll-avcc";
};

&reg_dc1sw {
	regulator-name = "vcc-lcd";
};

&reg_dcdc1 {
	regulator-always-on;
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-3v3";
};

&reg_dcdc2 {
	regulator-always-on;
	regulator-min-microvolt = <1000000>;
	regulator-max-microvolt = <1300000>;
	regulator-name = "vdd-cpux";
};

/* DCDC3 is polyphased with DCDC2 */

&reg_dcdc5 {
	regulator-always-on;
	regulator-min-microvolt = <1200000>;
	regulator-max-microvolt = <1200000>;
	regulator-name = "vcc-dram";
};

&reg_dcdc6 {
	regulator-always-on;
	regulator-min-microvolt = <1100000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-sys";
};

&reg_dldo1 {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-hdmi";
};

&reg_dldo2 {
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
	regulator-name = "vcc-edp";
};

&reg_dldo3 {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "avdd-csi";
};

&reg_dldo4 {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-wifi";
};

&reg_eldo1 {
	regulator-always-on;
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-name = "cpvdd";
};

&reg_eldo3 {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-name = "vdd-1v8-csi";
};

&reg_fldo1 {
	regulator-min-microvolt = <1200000>;
	regulator-max-microvolt = <1200000>;
	regulator-name = "vcc-1v2-hsic";
};

&reg_fldo2 {
	regulator-always-on;
	regulator-min-microvolt = <1100000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-cpus";
};

&reg_ldo_io0 {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-usb";
	status = "okay";
};

&reg_rtc_ldo {
	regulator-name = "vcc-rtc";
};

&simplefb_hdmi {
	vcc-hdmi-supply = <&reg_dldo1>;
};

&sound {
	status = "okay";
	simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
	simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
				    "Microphone", "Internal Microphone Right",
				    "Headphone", "Headphone Jack",
				    "Speaker", "Internal Speaker";
	simple-audio-card,routing =
			"Left DAC", "AIF1 Slot 0 Left",
			"Right DAC", "AIF1 Slot 0 Right",
			"Speaker Amp INL", "LINEOUT",
			"Speaker Amp INR", "LINEOUT",
			"Internal Speaker", "Speaker Amp OUTL",
			"Internal Speaker", "Speaker Amp OUTR",
			"Headphone Jack", "HP",
			"AIF1 Slot 0 Left ADC", "Left ADC",
			"AIF1 Slot 0 Right ADC", "Right ADC",
			"Internal Microphone Left", "MBIAS",
			"MIC1", "Internal Microphone Left",
			"Internal Microphone Right", "HBIAS",
			"MIC2", "Internal Microphone Right";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pb_pins>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
	status = "okay";

	bluetooth {
		compatible = "realtek,rtl8723cs-bt";
		reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
		device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
		host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
		firmware-postfix = "pinebook";
	};
};

&usb_otg {
	dr_mode = "host";
};

&usbphy {
	usb0_vbus-supply = <&reg_ldo_io0>;
	usb1_vbus-supply = <&reg_ldo_io0>;
	status = "okay";
};

teres

Spoiler


/*
 * Copyright (C) Harald Geyer <harald@ccbib.org>
 * based on sun50i-a64-olinuxino.dts by Jagan Teki <jteki@openedev.com>
 *
 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
 */

/dts-v1/;

#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>

/ {
	model = "Olimex A64 Teres-I";
	compatible = "olimex,a64-teres-i", "allwinner,sun50i-a64";

	aliases {
		serial0 = &uart0;
	};

	backlight: backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm 0 50000 0>;
		power-supply = <&reg_dcdc1>;
		brightness-levels = <0 5 7 10 14 20 28 40 56 80 112>;
		default-brightness-level = <5>;
		enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
	};

	chosen {
		stdout-path = "serial0:115200n8";

		framebuffer-lcd {
			eDP25-supply = <&reg_dldo2>;
			eDP12-supply = <&reg_dldo3>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		lid-switch {
			label = "Lid Switch";
			gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
			linux,input-type = <EV_SW>;
			linux,code = <SW_LID>;
			wakeup-source;
		};
	};

	leds {
		compatible = "gpio-leds";

		capslock {
			label = "teres-i:green:capslock";
			gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
		};

		numlock {
			label = "teres-i:green:numlock";
			gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */
		};
	};

	reg_usb1_vbus: usb1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb1-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
		status = "okay";
	};

	wifi_pwrseq: wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
	};

	speaker_amp: audio-amplifier {
		compatible = "simple-audio-amplifier";
		enable-gpios = <&r_pio 0 12 GPIO_ACTIVE_HIGH>; /* PL12 */
		sound-name-prefix = "Speaker Amp";
	};
};

&codec {
	status = "okay";
};

&codec_analog {
	cpvdd-supply = <&reg_eldo1>;
	status = "okay";
};

&dai {
	status = "okay";
};

&de {
	status = "okay";
};

&cpu0 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu1 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu2 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu3 {
	cpu-supply = <&reg_dcdc2>;
};

&ehci1 {
	status = "okay";
};


&i2c0 {
	clock-frequency = <100000>;
	status = "okay";

	anx6345: anx6345@38 {
		compatible = "analogix,anx6345";
		reg = <0x38>;
		reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
		dvdd25-supply = <&reg_dldo2>;
		dvdd12-supply = <&reg_dldo3>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				anx6345_in: endpoint {
					remote-endpoint = <&tcon0_out_anx6345>;
				};
			};
		};
	};
};

&mixer0 {
	status = "okay";
};

&mmc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	vmmc-supply = <&reg_dcdc1>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
	disable-wp;
	bus-width = <4>;
	status = "okay";
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&reg_aldo2>;
	vqmmc-supply = <&reg_dldo4>;
	mmc-pwrseq = <&wifi_pwrseq>;
	bus-width = <4>;
	non-removable;
	status = "okay";

	rtl8723bs: wifi@1 {
		reg = <1>;
		interrupt-parent = <&r_pio>;
		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
		interrupt-names = "host-wake";
	};
};

&mmc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc2_pins>;
	vmmc-supply = <&reg_dcdc1>;
	vqmmc-supply = <&reg_dcdc1>;
	bus-width = <8>;
	non-removable;
	cap-mmc-hw-reset;
	status = "okay";
};

&ohci1 {
	status = "okay";
};

&pwm {
	status = "okay";
};

&r_rsb {
	status = "okay";

	axp803: pmic@3a3 {
		compatible = "x-powers,axp803";
		reg = <0x3a3>;
		interrupt-parent = <&r_intc>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
		wakeup-source;
	};
};

#include "axp803.dtsi"

&ac_power_supply {
	status = "okay";
};

&battery_power_supply {
	status = "okay";
};

&reg_aldo1 {
	regulator-always-on;
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
	regulator-name = "vcc-pe";
};

&reg_aldo2 {
	regulator-always-on;
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-pl";
};

&reg_aldo3 {
	regulator-always-on;
	regulator-min-microvolt = <3000000>;
	regulator-max-microvolt = <3000000>;
	regulator-name = "vcc-pll-avcc";
};

&reg_dcdc1 {
	regulator-always-on;
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-3v3";
};

&reg_dcdc2 {
	regulator-always-on;
	regulator-min-microvolt = <1040000>;
	regulator-max-microvolt = <1300000>;
	regulator-name = "vdd-cpux";
};

/* DCDC3 is polyphased with DCDC2 */

&reg_dcdc5 {
	regulator-always-on;
	regulator-min-microvolt = <1500000>;
	regulator-max-microvolt = <1500000>;
	regulator-name = "vcc-ddr3";
};

&reg_dcdc6 {
	regulator-always-on;
	regulator-min-microvolt = <1100000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-sys";
};

&reg_dldo1 {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-hdmi";
};

&reg_dldo2 {
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
	regulator-name = "vcc-pd";
};

&reg_dldo3 {
	regulator-min-microvolt = <1200000>;
	regulator-max-microvolt = <1200000>;
	regulator-name = "vdd-edp";
};

&reg_dldo4 {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-wifi-io";
};

&reg_eldo1 {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-name = "cpvdd";
};

&reg_eldo2 {
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-name = "vcc-dvdd-csi";
};

&reg_fldo1 {
	regulator-min-microvolt = <1200000>;
	regulator-max-microvolt = <1200000>;
	regulator-name = "vcc-1v2-hsic";
};

/*
 * The A64 chip cannot work with this regulator off, although
 * it seems to be only driving the AR100 core.
 * Maybe we don't still know well about CPUs domain.
 */
&reg_fldo2 {
	regulator-always-on;
	regulator-min-microvolt = <1100000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-cpus";
};

&reg_rtc_ldo {
	regulator-name = "vcc-rtc";
};

&simplefb_hdmi {
	vcc-hdmi-supply = <&reg_dldo1>;
};

&sound {
	simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
	simple-audio-card,widgets = "Headphone", "Headphone Jack",
				    "Microphone", "Headset Microphone",
				    "Microphone", "Internal Microphone",
				    "Speaker", "Internal Speaker";
	simple-audio-card,routing =
			"Left DAC", "AIF1 Slot 0 Left",
			"Right DAC", "AIF1 Slot 0 Right",
			"AIF1 Slot 0 Left ADC", "Left ADC",
			"AIF1 Slot 0 Right ADC", "Right ADC",
			"Headphone Jack", "HP",
			"Speaker Amp INL", "LINEOUT",
			"Speaker Amp INR", "LINEOUT",
			"Internal Speaker", "Speaker Amp OUTL",
			"Internal Speaker", "Speaker Amp OUTR",
			"Internal Microphone", "MBIAS",
			"MIC1", "Internal Microphone",
			"Headset Microphone", "HBIAS",
			"MIC2", "Headset Microphone";
	status = "okay";
};

&tcon0 {
	pinctrl-names = "default";
	pinctrl-0 = <&lcd_rgb666_pins>;

	status = "okay";
};

&tcon0_out {
	tcon0_out_anx6345: endpoint@0 {
		reg = <0>;
		remote-endpoint = <&anx6345_in>;
	};
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pb_pins>;
	status = "okay";
};

&usbphy {
	usb1_vbus-supply = <&reg_usb1_vbus>;
	status = "okay";
};

Icenowy · February 12, 2020

@Igor seems that you are at a 5.6 base now.

Thus try my patches on 5.6?

https://github.com/Icenowy/linux/commit/8df6da42f1244573edd3d22d39dbe8fc66a01cbd This fixes supply name issue for anx6345, should fixes TERES

https://github.com/Icenowy/linux/commit/b68d225323c9a479b26ee22a2cb4bf4eefe13cc5 This adds ANX6345 node to Pinebook.

Igor · February 12, 2020

@Icenowy Thanks, success! Pinebook works now, but Teres don't. I don't get u-boot prompt on Teres at all - but we had it on previous version ... dunno what was changed, while Pinebook properly detects and prompt which panel its used. Huh?

Neko May · February 12, 2020

Orange Pi Zero +2 H3 fails with both existing 20.02-RC images. Last 19 image is functional.

Details:

Icenowy · February 12, 2020

4 hours ago, Igor said:

@Icenowy Thanks, success! Pinebook works now, but Teres don't. I don't get u-boot prompt on Teres at all - but we had it on previous version ... dunno what was changed, while Pinebook properly detects and prompt which panel its used. Huh?

I took out my own TERES-I and now debugging...

A weird experience. ANX bridge and panel are recognized, but nothing is displayed.

Icenowy · February 12, 2020

@Igor If you want to support 5.4 now, you can cherry-pick patches from https://github.com/AOSC-Dev/linux/tree/aosc-sunxi64-5.4.y , this currently works.

Igor · February 12, 2020

35 minutes ago, Icenowy said:

If you want to support 5.4 now, you can cherry-pick patches from

Just to clarify. You get Teres screen up with this kernel? Even u-boot stays dark?

Icenowy · February 12, 2020

28 minutes ago, Igor said:

Just to clarify. You get Teres screen up with this kernel? Even u-boot stays dark?

My U-Boot is not dark, but this kernel should have peoper KMS support for TERES.

Igor · February 12, 2020

13 minutes ago, Icenowy said:

My U-Boot is not dark

Which one you are using?

Igor · February 12, 2020

Teres screen is up with a clean mainline u-boot 2020.01 ... but keyboard is not working Investigating.

Edit: It seems like a HW issue. Stock Olimex images = no keyboard.

Edited February 12, 2020 by Igor
Add new info

Icenowy · February 13, 2020

10 hours ago, Igor said:

Teres screen is up with a clean mainline u-boot 2020.01 ... but keyboard is not working Investigating.

Edit: It seems like a HW issue. Stock Olimex images = no keyboard.

The keyboard loads a updater, then after a small time span it unloads the updater and loads the real keyboard.

U-Boot can only recognize the updater.

JMCC · February 13, 2020

Here is an update about multimedia integration: I have been trying to make all the Rockchip-legacy stuff work on Buster, and I am not able to get accelerated X desktop. I cannot find the exact cause, apparently something is making eglInitailize() fail. My guess is it has something to do with mesa libs, but could not debug the exact cause.

In Rockchip, they are working in a completely new approach, using exa instead of glamor acceleration. They need to use for that another particular feature of their SoC's, called Rockchip-rga, which in turn needs its special kernel driver and userspace libs (similar to their rk-mpp). So far, it does not seem to be working in the 'stable-4.4-rk3288-linux' branch we are using, and the stable-v2 branch does not compile ATM. I wasn't even able to make it work with their own linaro image.

So my proposal is that we keep the download option of Bionic Legacy Desktop for all the rockchips, with the link to the media-script thread, for those who need to use some of the features that are still only available in legacy kernels. ( @Igor would it be possible to keep it for a while? Bionic still has three years of support ).

With newer releases (Buster, Focal), we will focus on mainline, and hopefully at some point legacy won't be necessary at all.

Neko May · February 14, 2020

The kernels shipping with the 20.02-RC builds have their kernel message buffer size set far too small; the beginning of the message buffer has already started to be overwritten by the time the login prompt comes up. This rather unfortunately complicates testing the images due to the loss of information. Similarly, the default setting of "verbosity=1" in armbianEnv.txt has the similar effect of frustrating testing efforts as there is no output on the serial port until the login prompt. I propose the friendly suggestion to increase the dmesg buffer size to at least 256KB, and set the verbosity to 7 by default; I don't think the kind of people who use these boards are going to be afraid of kernel messages.

lanefu · February 14, 2020

8 minutes ago, Neko May said:

The kernels shipping with the 20.02-RC builds have their kernel message buffer size set far too small; the beginning of the message buffer has already started to be overwritten by the time the login prompt comes up. This rather unfortunately complicates testing the images due to the loss of information. Similarly, the default setting of "verbosity=1" in armbianEnv.txt has the similar effect of frustrating testing efforts as there is no output on the serial port until the login prompt. I propose the friendly suggestion to increase the dmesg buffer size to at least 256KB, and set the verbosity to 7 by default; I don't think the kind of people who use these boards are going to be afraid of kernel messages.

Probably running the default... which board are you testing? I'm glad you pointed out the verbosity setting.. i had assumed it was something else preventing output...

were you able to get more verbose logging after updating armbianEnv.txt?

Neko May · February 14, 2020

10 minutes ago, lanefu said:

Probably running the default... which board are you testing? I'm glad you pointed out the verbosity setting.. i had assumed it was something else preventing output...

were you able to get more verbose logging after updating armbianEnv.txt?

I've seen it on a few boards, but the only one I can definitively say right now is the Orange Pi 3. I'd have to check the other boards one by one and see whether they do the same.

As for the verbosity setting, yes, setting it to 7 will give you all the kernel output on serial (as well as HDMI if applicable).

Sign In

Armbian 20.02 (Chiru) Release Thread

Recommended Posts

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Link to comment

Share on other sites

Important Information